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@@ -668,3 +668,171 @@ static const struct vpif_input dm6467_ch1_inputs[] = {
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.std = TVP514X_STD_ALL,
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},
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.subdev_name = TVP5147_CH1,
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+ .input_route = INPUT_SVIDEO_VI2C_VI1C,
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+ .output_route = OUTPUT_10BIT_422_EMBEDDED_SYNC,
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+ },
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+};
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+
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+static struct vpif_capture_config dm646x_vpif_capture_cfg = {
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+ .setup_input_path = setup_vpif_input_path,
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+ .setup_input_channel_mode = setup_vpif_input_channel_mode,
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+ .subdev_info = vpif_capture_sdev_info,
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+ .subdev_count = ARRAY_SIZE(vpif_capture_sdev_info),
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+ .chan_config[0] = {
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+ .inputs = dm6467_ch0_inputs,
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+ .input_count = ARRAY_SIZE(dm6467_ch0_inputs),
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+ .vpif_if = {
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+ .if_type = VPIF_IF_BT656,
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+ .hd_pol = 1,
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+ .vd_pol = 1,
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+ .fid_pol = 0,
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+ },
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+ },
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+ .chan_config[1] = {
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+ .inputs = dm6467_ch1_inputs,
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+ .input_count = ARRAY_SIZE(dm6467_ch1_inputs),
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+ .vpif_if = {
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+ .if_type = VPIF_IF_BT656,
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+ .hd_pol = 1,
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+ .vd_pol = 1,
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+ .fid_pol = 0,
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+ },
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+ },
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+};
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+
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+static void __init evm_init_video(void)
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+{
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+ spin_lock_init(&vpif_reg_lock);
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+
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+ dm646x_setup_vpif(&dm646x_vpif_display_config,
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+ &dm646x_vpif_capture_cfg);
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+}
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+
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+static void __init evm_init_i2c(void)
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+{
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+ davinci_init_i2c(&i2c_pdata);
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+ i2c_add_driver(&dm6467evm_cpld_driver);
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+ i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
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+ evm_init_cpld();
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+ evm_init_video();
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+}
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+
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+#define CDCE949_XIN_RATE 27000000
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+
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+/* CDCE949 support - "lpsc" field is overridden to work as clock number */
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+static struct clk cdce_clk_in = {
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+ .name = "cdce_xin",
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+ .rate = CDCE949_XIN_RATE,
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+};
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+
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+static struct clk_lookup cdce_clks[] = {
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+ CLK(NULL, "xin", &cdce_clk_in),
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+ CLK(NULL, NULL, NULL),
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+};
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+
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+static void __init cdce_clk_init(void)
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+{
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+ struct clk_lookup *c;
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+ struct clk *clk;
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+
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+ for (c = cdce_clks; c->clk; c++) {
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+ clk = c->clk;
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+ clkdev_add(c);
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+ clk_register(clk);
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+ }
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+}
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+
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+#define DM6467T_EVM_REF_FREQ 33000000
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+
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+static void __init davinci_map_io(void)
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+{
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+ dm646x_init();
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+
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+ if (machine_is_davinci_dm6467tevm())
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+ davinci_set_refclk_rate(DM6467T_EVM_REF_FREQ);
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+
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+ cdce_clk_init();
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+}
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+
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+static struct davinci_uart_config uart_config __initdata = {
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+ .enabled_uarts = (1 << 0),
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+};
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+
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+#define DM646X_EVM_PHY_ID "davinci_mdio-0:01"
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+/*
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+ * The following EDMA channels/slots are not being used by drivers (for
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+ * example: Timer, GPIO, UART events etc) on dm646x, hence they are being
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+ * reserved for codecs on the DSP side.
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+ */
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+static const s16 dm646x_dma_rsv_chans[][2] = {
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+ /* (offset, number) */
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+ { 0, 4},
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+ {13, 3},
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+ {24, 4},
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+ {30, 2},
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+ {54, 3},
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+ {-1, -1}
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+};
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+
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+static const s16 dm646x_dma_rsv_slots[][2] = {
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+ /* (offset, number) */
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+ { 0, 4},
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+ {13, 3},
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+ {24, 4},
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+ {30, 2},
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+ {54, 3},
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+ {128, 384},
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+ {-1, -1}
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+};
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+
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+static struct edma_rsv_info dm646x_edma_rsv[] = {
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+ {
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+ .rsv_chans = dm646x_dma_rsv_chans,
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+ .rsv_slots = dm646x_dma_rsv_slots,
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+ },
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+};
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+
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+static __init void evm_init(void)
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+{
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+ struct davinci_soc_info *soc_info = &davinci_soc_info;
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+
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+ evm_init_i2c();
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+ davinci_serial_init(&uart_config);
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+ dm646x_init_mcasp0(&dm646x_evm_snd_data[0]);
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+ dm646x_init_mcasp1(&dm646x_evm_snd_data[1]);
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+
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+ if (machine_is_davinci_dm6467tevm())
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+ davinci_nand_data.timing = &dm6467tevm_nandflash_timing;
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+
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+ platform_device_register(&davinci_nand_device);
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+
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+ dm646x_init_edma(dm646x_edma_rsv);
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+
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+ if (HAS_ATA)
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+ davinci_init_ide();
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+
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+ soc_info->emac_pdata->phy_id = DM646X_EVM_PHY_ID;
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+}
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+
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+MACHINE_START(DAVINCI_DM6467_EVM, "DaVinci DM646x EVM")
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+ .atag_offset = 0x100,
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+ .map_io = davinci_map_io,
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+ .init_irq = davinci_irq_init,
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+ .timer = &davinci_timer,
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+ .init_machine = evm_init,
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+ .init_late = davinci_init_late,
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+ .dma_zone_size = SZ_128M,
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+ .restart = davinci_restart,
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+MACHINE_END
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+
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+MACHINE_START(DAVINCI_DM6467TEVM, "DaVinci DM6467T EVM")
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+ .atag_offset = 0x100,
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+ .map_io = davinci_map_io,
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+ .init_irq = davinci_irq_init,
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+ .timer = &davinci_timer,
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+ .init_machine = evm_init,
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+ .init_late = davinci_init_late,
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+ .dma_zone_size = SZ_128M,
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+ .restart = davinci_restart,
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+MACHINE_END
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+
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