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				@@ -1326,3 +1326,177 @@ same as the fault fields in the FAR */ 
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				 #define TLBTR2_VA_MASK            0x000FFFFF 
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				+/* Global Register Shifts */ 
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				+/* CBACRn */ 
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				+#define RWVMID_SHIFT             0 
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				+#define RWE_SHIFT                8 
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				+#define RWGE_SHIFT               9 
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				+#define CBVMID_SHIFT             16 
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				+#define IRPTNDX_SHIFT            24 
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				+ 
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				+ 
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				+/* CR */ 
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				+#define RPUE_SHIFT               0 
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				+#define RPUERE_SHIFT             1 
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				+#define RPUEIE_SHIFT             2 
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				+#define DCDEE_SHIFT              3 
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				+#define CLIENTPD_SHIFT           4 
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				+#define STALLD_SHIFT             5 
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				+#define TLBLKCRWE_SHIFT          6 
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				+#define CR_TLBIALLCFG_SHIFT      7 
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				+#define TLBIVMIDCFG_SHIFT        8 
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				+#define CR_HUME_SHIFT            9 
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				+ 
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				+ 
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				+/* ESR */ 
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				+#define CFG_SHIFT                0 
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				+#define BYPASS_SHIFT             1 
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				+#define ESR_MULTI_SHIFT          31 
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				+ 
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				+ 
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				+/* ESYNR0 */ 
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				+#define ESYNR0_AMID_SHIFT        0 
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				+#define ESYNR0_APID_SHIFT        8 
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				+#define ESYNR0_ABID_SHIFT        13 
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				+#define ESYNR0_AVMID_SHIFT       16 
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				+#define ESYNR0_ATID_SHIFT        24 
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				+ 
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				+ 
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				+/* ESYNR1 */ 
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				+#define ESYNR1_AMEMTYPE_SHIFT           0 
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				+#define ESYNR1_ASHARED_SHIFT            3 
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				+#define ESYNR1_AINNERSHARED_SHIFT       4 
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				+#define ESYNR1_APRIV_SHIFT              5 
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				+#define ESYNR1_APROTNS_SHIFT            6 
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				+#define ESYNR1_AINST_SHIFT              7 
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				+#define ESYNR1_AWRITE_SHIFT             8 
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				+#define ESYNR1_ABURST_SHIFT             10 
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				+#define ESYNR1_ALEN_SHIFT               12 
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				+#define ESYNR1_ASIZE_SHIFT              16 
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				+#define ESYNR1_ALOCK_SHIFT              20 
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				+#define ESYNR1_AOOO_SHIFT               22 
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				+#define ESYNR1_AFULL_SHIFT              24 
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				+#define ESYNR1_AC_SHIFT                 30 
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				+#define ESYNR1_DCD_SHIFT                31 
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				+ 
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				+ 
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				+/* IDR */ 
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				+#define NM2VCBMT_SHIFT           0 
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				+#define HTW_SHIFT                9 
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				+#define HUM_SHIFT                10 
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				+#define TLBSIZE_SHIFT            12 
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				+#define NCB_SHIFT                16 
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				+#define NIRPT_SHIFT              24 
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				+ 
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				+ 
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				+/* M2VCBRn */ 
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				+#define VMID_SHIFT               0 
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				+#define CBNDX_SHIFT              8 
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				+#define BYPASSD_SHIFT            16 
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				+#define BPRCOSH_SHIFT            17 
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				+#define BPRCISH_SHIFT            18 
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				+#define BPRCNSH_SHIFT            19 
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				+#define BPSHCFG_SHIFT            20 
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				+#define NSCFG_SHIFT              22 
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				+#define BPMTCFG_SHIFT            24 
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				+#define BPMEMTYPE_SHIFT          25 
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				+ 
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				+ 
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				+/* REV */ 
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				+#define MINOR_SHIFT              0 
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				+#define MAJOR_SHIFT              4 
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				+ 
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				+ 
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				+/* TESTBUSCR */ 
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				+#define TBE_SHIFT                0 
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				+#define SPDMBE_SHIFT             1 
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				+#define WGSEL_SHIFT              8 
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				+#define TBLSEL_SHIFT             12 
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				+#define TBHSEL_SHIFT             14 
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				+#define SPDM0SEL_SHIFT           16 
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				+#define SPDM1SEL_SHIFT           20 
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				+#define SPDM2SEL_SHIFT           24 
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				+#define SPDM3SEL_SHIFT           28 
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				+ 
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				+ 
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				+/* TLBIMID */ 
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				+#define TLBIVMID_VMID_SHIFT      0 
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				+ 
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				+ 
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				+/* TLBRSW */ 
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				+#define TLBRSW_INDEX_SHIFT       0 
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				+#define TLBBFBS_SHIFT            8 
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				+ 
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				+ 
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				+/* TLBTR0 */ 
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				+#define PR_SHIFT                 0 
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				+#define PW_SHIFT                 1 
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				+#define UR_SHIFT                 2 
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				+#define UW_SHIFT                 3 
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				+#define XN_SHIFT                 4 
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				+#define NSDESC_SHIFT             6 
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				+#define ISH_SHIFT                7 
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				+#define SH_SHIFT                 8 
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				+#define MT_SHIFT                 9 
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				+#define DPSIZR_SHIFT             16 
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				+#define DPSIZC_SHIFT             20 
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				+ 
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				+ 
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				+/* TLBTR1 */ 
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				+#define TLBTR1_VMID_SHIFT        0 
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				+#define TLBTR1_PA_SHIFT          12 
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				+ 
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				+ 
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				+/* TLBTR2 */ 
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				+#define TLBTR2_ASID_SHIFT        0 
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				+#define TLBTR2_V_SHIFT           8 
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				+#define TLBTR2_NSTID_SHIFT       9 
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				+#define TLBTR2_NV_SHIFT          10 
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				+#define TLBTR2_VA_SHIFT          12 
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				+ 
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				+ 
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				+/* Context Register Masks */ 
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				+/* ACTLR */ 
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				+#define CFERE_MASK                       0x01 
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				+#define CFEIE_MASK                       0x01 
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				+#define PTSHCFG_MASK                     0x03 
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				+#define RCOSH_MASK                       0x01 
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				+#define RCISH_MASK                       0x01 
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				+#define RCNSH_MASK                       0x01 
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				+#define PRIVCFG_MASK                     0x03 
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				+#define DNA_MASK                         0x01 
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				+#define DNLV2PA_MASK                     0x01 
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				+#define TLBMCFG_MASK                     0x03 
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				+#define CFCFG_MASK                       0x01 
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				+#define TIPCF_MASK                       0x01 
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				+#define V2PCFG_MASK                      0x03 
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				+#define HUME_MASK                        0x01 
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				+#define PTMTCFG_MASK                     0x01 
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				+#define PTMEMTYPE_MASK                   0x07 
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				+ 
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				+ 
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				+/* BFBCR */ 
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				+#define BFBDFE_MASK                      0x01 
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				+#define BFBSFE_MASK                      0x01 
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				+#define SFVS_MASK                        0x01 
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				+#define FLVIC_MASK                       0x0F 
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				+#define SLVIC_MASK                       0x0F 
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				+ 
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				+ 
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				+/* CONTEXTIDR */ 
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				+#define CONTEXTIDR_ASID_MASK             0xFF 
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				+#define PROCID_MASK                      0x00FFFFFF 
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				+ 
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				+ 
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				+/* FSR */ 
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				+#define TF_MASK                          0x01 
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				+#define AFF_MASK                         0x01 
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				+#define APF_MASK                         0x01 
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				+#define TLBMF_MASK                       0x01 
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				+#define HTWDEEF_MASK                     0x01 
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				+#define HTWSEEF_MASK                     0x01 
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				+#define MHF_MASK                         0x01 
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				+#define SL_MASK                          0x01 
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				+#define SS_MASK                          0x01 
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				+#define MULTI_MASK                       0x01 
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				+ 
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