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@@ -2495,3 +2495,102 @@ static struct pata_platform_info bfin_pata_platform_data = {
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static struct resource bfin_pata_resources[] = {
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{
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.start = 0x20314020,
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+ .end = 0x2031403F,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ .start = 0x2031401C,
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+ .end = 0x2031401F,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ .start = PATA_INT,
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+ .end = PATA_INT,
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+ .flags = IORESOURCE_IRQ,
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+ },
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+};
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+#elif defined(CF_IDE_NAND_CARD_USE_CF_IN_COMMON_MEMORY_MODE)
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+static struct pata_platform_info bfin_pata_platform_data = {
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+ .ioport_shift = 0,
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+};
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+/* CompactFlash Storage Card Memory Mapped Addressing
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+ * /REG = A11 = 1
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+ */
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+static struct resource bfin_pata_resources[] = {
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+ {
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+ .start = 0x20211800,
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+ .end = 0x20211807,
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+ .flags = IORESOURCE_MEM,
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+ },
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+ {
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+ .start = 0x2021180E, /* Device Ctl */
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+ .end = 0x2021180E,
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+ .flags = IORESOURCE_MEM,
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+ },
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+};
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+#endif
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+
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+static struct platform_device bfin_pata_device = {
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+ .name = "pata_platform",
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+ .id = -1,
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+ .num_resources = ARRAY_SIZE(bfin_pata_resources),
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+ .resource = bfin_pata_resources,
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+ .dev = {
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+ .platform_data = &bfin_pata_platform_data,
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+ }
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+};
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+#endif
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+
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+static const unsigned int cclk_vlev_datasheet[] =
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+{
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+ VRPAIR(VLEV_085, 250000000),
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+ VRPAIR(VLEV_090, 376000000),
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+ VRPAIR(VLEV_095, 426000000),
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+ VRPAIR(VLEV_100, 426000000),
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+ VRPAIR(VLEV_105, 476000000),
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+ VRPAIR(VLEV_110, 476000000),
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+ VRPAIR(VLEV_115, 476000000),
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+ VRPAIR(VLEV_120, 500000000),
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+ VRPAIR(VLEV_125, 533000000),
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+ VRPAIR(VLEV_130, 600000000),
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+};
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+
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+static struct bfin_dpmc_platform_data bfin_dmpc_vreg_data = {
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+ .tuple_tab = cclk_vlev_datasheet,
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+ .tabsize = ARRAY_SIZE(cclk_vlev_datasheet),
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+ .vr_settling_time = 25 /* us */,
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+};
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+
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+static struct platform_device bfin_dpmc = {
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+ .name = "bfin dpmc",
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+ .dev = {
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+ .platform_data = &bfin_dmpc_vreg_data,
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+ },
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+};
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+
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+#if defined(CONFIG_SND_BF5XX_I2S) || defined(CONFIG_SND_BF5XX_I2S_MODULE) || \
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+ defined(CONFIG_SND_BF5XX_TDM) || defined(CONFIG_SND_BF5XX_TDM_MODULE) || \
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+ defined(CONFIG_SND_BF5XX_AC97) || defined(CONFIG_SND_BF5XX_AC97_MODULE)
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+
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+#define SPORT_REQ(x) \
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+ [x] = {P_SPORT##x##_TFS, P_SPORT##x##_DTPRI, P_SPORT##x##_TSCLK, \
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+ P_SPORT##x##_RFS, P_SPORT##x##_DRPRI, P_SPORT##x##_RSCLK, 0}
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+
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+static const u16 bfin_snd_pin[][7] = {
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+ SPORT_REQ(0),
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+ SPORT_REQ(1),
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+};
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+
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+static struct bfin_snd_platform_data bfin_snd_data[] = {
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+ {
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+ .pin_req = &bfin_snd_pin[0][0],
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+ },
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+ {
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+ .pin_req = &bfin_snd_pin[1][0],
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+ },
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+};
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+
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+#define BFIN_SND_RES(x) \
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+ [x] = { \
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+ { \
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+ .start = SPORT##x##_TCR1, \
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