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@@ -2856,3 +2856,120 @@ static struct omap_hwmod_addr_space omap3xxx_dss_dsi1_addrs[] = {
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/* l4_core -> dss_dsi1 */
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static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_dsi1 = {
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.master = &omap3xxx_l4_core_hwmod,
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+ .slave = &omap3xxx_dss_dsi1_hwmod,
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+ .clk = "dss_ick",
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+ .addr = omap3xxx_dss_dsi1_addrs,
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+ .fw = {
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+ .omap2 = {
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+ .l4_fw_region = OMAP3_L4_CORE_FW_DSS_DSI_REGION,
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+ .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,
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+ .flags = OMAP_FIREWALL_L4,
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+ }
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+ },
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_core -> dss_rfbi */
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+static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_rfbi = {
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+ .master = &omap3xxx_l4_core_hwmod,
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+ .slave = &omap3xxx_dss_rfbi_hwmod,
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+ .clk = "dss_ick",
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+ .addr = omap2_dss_rfbi_addrs,
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+ .fw = {
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+ .omap2 = {
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+ .l4_fw_region = OMAP3_L4_CORE_FW_DSS_RFBI_REGION,
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+ .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP ,
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+ .flags = OMAP_FIREWALL_L4,
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+ }
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+ },
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_core -> dss_venc */
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+static struct omap_hwmod_ocp_if omap3xxx_l4_core__dss_venc = {
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+ .master = &omap3xxx_l4_core_hwmod,
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+ .slave = &omap3xxx_dss_venc_hwmod,
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+ .clk = "dss_ick",
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+ .addr = omap2_dss_venc_addrs,
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+ .fw = {
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+ .omap2 = {
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+ .l4_fw_region = OMAP3_L4_CORE_FW_DSS_VENC_REGION,
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+ .l4_prot_group = OMAP3_L4_CORE_FW_DSS_PROT_GROUP,
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+ .flags = OMAP_FIREWALL_L4,
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+ }
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+ },
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+ .flags = OCPIF_SWSUP_IDLE,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_wkup -> gpio1 */
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+static struct omap_hwmod_addr_space omap3xxx_gpio1_addrs[] = {
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+ {
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+ .pa_start = 0x48310000,
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+ .pa_end = 0x483101ff,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_ocp_if omap3xxx_l4_wkup__gpio1 = {
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+ .master = &omap3xxx_l4_wkup_hwmod,
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+ .slave = &omap3xxx_gpio1_hwmod,
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+ .addr = omap3xxx_gpio1_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_per -> gpio2 */
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+static struct omap_hwmod_addr_space omap3xxx_gpio2_addrs[] = {
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+ {
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+ .pa_start = 0x49050000,
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+ .pa_end = 0x490501ff,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio2 = {
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+ .master = &omap3xxx_l4_per_hwmod,
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+ .slave = &omap3xxx_gpio2_hwmod,
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+ .addr = omap3xxx_gpio2_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/* l4_per -> gpio3 */
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+static struct omap_hwmod_addr_space omap3xxx_gpio3_addrs[] = {
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+ {
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+ .pa_start = 0x49052000,
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+ .pa_end = 0x490521ff,
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+ .flags = ADDR_TYPE_RT
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+ },
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+ { }
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+};
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+
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+static struct omap_hwmod_ocp_if omap3xxx_l4_per__gpio3 = {
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+ .master = &omap3xxx_l4_per_hwmod,
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+ .slave = &omap3xxx_gpio3_hwmod,
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+ .addr = omap3xxx_gpio3_addrs,
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+ .user = OCP_USER_MPU | OCP_USER_SDMA,
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+};
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+
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+/*
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+ * 'mmu' class
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+ * The memory management unit performs virtual to physical address translation
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+ * for its requestors.
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+ */
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+
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+static struct omap_hwmod_class_sysconfig mmu_sysc = {
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+ .rev_offs = 0x000,
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+ .sysc_offs = 0x010,
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+ .syss_offs = 0x014,
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+ .sysc_flags = (SYSC_HAS_CLOCKACTIVITY | SYSC_HAS_SIDLEMODE |
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+ SYSC_HAS_SOFTRESET | SYSC_HAS_AUTOIDLE),
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+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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+ .sysc_fields = &omap_hwmod_sysc_type1,
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+};
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+
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+static struct omap_hwmod_class omap3xxx_mmu_hwmod_class = {
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+ .name = "mmu",
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+ .sysc = &mmu_sysc,
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+};
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