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@@ -148,3 +148,81 @@ struct usbhsf_private {
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struct clk *pci;
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struct clk *pci;
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struct clk *func;
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struct clk *func;
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struct clk *host;
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struct clk *host;
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+ void __iomem *usbh_base;
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+ struct renesas_usbhs_platform_info info;
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+};
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+
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+#define usbhsf_get_priv(pdev) \
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+ container_of(renesas_usbhs_get_info(pdev), \
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+ struct usbhsf_private, info)
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+
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+static int usbhsf_get_id(struct platform_device *pdev)
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+{
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+ return USBHS_GADGET;
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+}
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+
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+static void usbhsf_power_ctrl(struct platform_device *pdev,
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+ void __iomem *base, int enable)
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+{
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+ struct usbhsf_private *priv = usbhsf_get_priv(pdev);
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+
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+ /*
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+ * Work around for USB Function.
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+ * It needs USB host clock, and settings
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+ */
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+ if (enable) {
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+ /*
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+ * enable all the related usb clocks
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+ * for usb workaround
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+ */
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+ clk_enable(priv->usb24);
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+ clk_enable(priv->pci);
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+ clk_enable(priv->host);
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+ clk_enable(priv->func);
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+ clk_enable(priv->phy);
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+
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+ /*
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+ * set USBCR1
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+ *
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+ * Port1 is driven by USB function,
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+ * Port2 is driven by USB HOST
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+ * One HOST (Port1 or Port2 is HOST)
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+ * USB PLL input clock = 24MHz
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+ */
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+ __raw_writew(0xd750, USBCR1);
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+ mdelay(1);
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+
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+ /*
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+ * start USB Host
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+ */
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+ __raw_writel(0x0000000c, priv->usbh_base + USBH_USBCTR);
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+ __raw_writel(0x00000008, priv->usbh_base + USBH_USBCTR);
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+ mdelay(10);
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+
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+ /*
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+ * USB PHY Power ON
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+ */
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+ __raw_writew(0xd770, USBCR1);
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+ __raw_writew(0x4000, base + 0x102); /* USBF :: SUSPMODE */
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+
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+ } else {
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+ __raw_writel(0x0000010f, priv->usbh_base + USBH_USBCTR);
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+ __raw_writew(0xd7c0, USBCR1); /* GPIO */
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+
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+ clk_disable(priv->phy);
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+ clk_disable(priv->func); /* usb work around */
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+ clk_disable(priv->host); /* usb work around */
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+ clk_disable(priv->pci); /* usb work around */
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+ clk_disable(priv->usb24); /* usb work around */
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+ }
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+}
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+
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+static int usbhsf_get_vbus(struct platform_device *pdev)
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+{
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+ return gpio_get_value(GPIO_PORT209);
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+}
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+
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+static irqreturn_t usbhsf_interrupt(int irq, void *data)
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+{
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+ struct platform_device *pdev = data;
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+
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