efDataDiscreteRateMining calculationOfAverageCurrent.h 韩正义 commit at 2020-11-25

efDataDiscreteRateMining/averageCalculation/calculationOfAverageCurrent.h

@@ -60,3 +60,144 @@
 #define OMAP24XX_CLKSEL_MPU_SHIFT			0
 #define OMAP24XX_CLKSEL_MPU_MASK			(0x1f << 0)
 #define OMAP24XX_CLKSEL_MPU_WIDTH			5
+
+/* CM_CLKSTCTRL_MPU */
+#define OMAP24XX_AUTOSTATE_MPU_SHIFT			0
+#define OMAP24XX_AUTOSTATE_MPU_MASK			(1 << 0)
+
+/* CM_FCLKEN1_CORE specific bits*/
+#define OMAP24XX_EN_TV_SHIFT				2
+#define OMAP24XX_EN_TV_MASK				(1 << 2)
+#define OMAP24XX_EN_DSS2_SHIFT				1
+#define OMAP24XX_EN_DSS2_MASK				(1 << 1)
+#define OMAP24XX_EN_DSS1_SHIFT				0
+#define OMAP24XX_EN_DSS1_MASK				(1 << 0)
+
+/* CM_FCLKEN2_CORE specific bits */
+#define OMAP2430_EN_I2CHS2_SHIFT			20
+#define OMAP2430_EN_I2CHS2_MASK				(1 << 20)
+#define OMAP2430_EN_I2CHS1_SHIFT			19
+#define OMAP2430_EN_I2CHS1_MASK				(1 << 19)
+#define OMAP2430_EN_MMCHSDB2_SHIFT			17
+#define OMAP2430_EN_MMCHSDB2_MASK			(1 << 17)
+#define OMAP2430_EN_MMCHSDB1_SHIFT			16
+#define OMAP2430_EN_MMCHSDB1_MASK			(1 << 16)
+
+/* CM_ICLKEN1_CORE specific bits */
+#define OMAP24XX_EN_MAILBOXES_SHIFT			30
+#define OMAP24XX_EN_MAILBOXES_MASK			(1 << 30)
+#define OMAP24XX_EN_DSS_SHIFT				0
+#define OMAP24XX_EN_DSS_MASK				(1 << 0)
+
+/* CM_ICLKEN2_CORE specific bits */
+
+/* CM_ICLKEN3_CORE */
+/* 2430 only */
+#define OMAP2430_EN_SDRC_SHIFT				2
+#define OMAP2430_EN_SDRC_MASK				(1 << 2)
+
+/* CM_ICLKEN4_CORE */
+#define OMAP24XX_EN_PKA_SHIFT				4
+#define OMAP24XX_EN_PKA_MASK				(1 << 4)
+#define OMAP24XX_EN_AES_SHIFT				3
+#define OMAP24XX_EN_AES_MASK				(1 << 3)
+#define OMAP24XX_EN_RNG_SHIFT				2
+#define OMAP24XX_EN_RNG_MASK				(1 << 2)
+#define OMAP24XX_EN_SHA_SHIFT				1
+#define OMAP24XX_EN_SHA_MASK				(1 << 1)
+#define OMAP24XX_EN_DES_SHIFT				0
+#define OMAP24XX_EN_DES_MASK				(1 << 0)
+
+/* CM_IDLEST1_CORE specific bits */
+#define OMAP24XX_ST_MAILBOXES_SHIFT			30
+#define OMAP24XX_ST_MAILBOXES_MASK			(1 << 30)
+#define OMAP24XX_ST_WDT4_SHIFT				29
+#define OMAP24XX_ST_WDT4_MASK				(1 << 29)
+#define OMAP2420_ST_WDT3_SHIFT				28
+#define OMAP2420_ST_WDT3_MASK				(1 << 28)
+#define OMAP24XX_ST_MSPRO_SHIFT				27
+#define OMAP24XX_ST_MSPRO_MASK				(1 << 27)
+#define OMAP24XX_ST_FAC_SHIFT				25
+#define OMAP24XX_ST_FAC_MASK				(1 << 25)
+#define OMAP2420_ST_EAC_SHIFT				24
+#define OMAP2420_ST_EAC_MASK				(1 << 24)
+#define OMAP24XX_ST_HDQ_SHIFT				23
+#define OMAP24XX_ST_HDQ_MASK				(1 << 23)
+#define OMAP2420_ST_I2C2_SHIFT				20
+#define OMAP2420_ST_I2C2_MASK				(1 << 20)
+#define OMAP2430_ST_I2CHS1_SHIFT			19
+#define OMAP2430_ST_I2CHS1_MASK				(1 << 19)
+#define OMAP2420_ST_I2C1_SHIFT				19
+#define OMAP2420_ST_I2C1_MASK				(1 << 19)
+#define OMAP2430_ST_I2CHS2_SHIFT			20
+#define OMAP2430_ST_I2CHS2_MASK				(1 << 20)
+#define OMAP24XX_ST_MCBSP2_SHIFT			16
+#define OMAP24XX_ST_MCBSP2_MASK				(1 << 16)
+#define OMAP24XX_ST_MCBSP1_SHIFT			15
+#define OMAP24XX_ST_MCBSP1_MASK				(1 << 15)
+#define OMAP24XX_ST_DSS_SHIFT				0
+#define OMAP24XX_ST_DSS_MASK				(1 << 0)
+
+/* CM_IDLEST2_CORE */
+#define OMAP2430_ST_MCBSP5_SHIFT			5
+#define OMAP2430_ST_MCBSP5_MASK				(1 << 5)
+#define OMAP2430_ST_MCBSP4_SHIFT			4
+#define OMAP2430_ST_MCBSP4_MASK				(1 << 4)
+#define OMAP2430_ST_MCBSP3_SHIFT			3
+#define OMAP2430_ST_MCBSP3_MASK				(1 << 3)
+#define OMAP24XX_ST_SSI_SHIFT				1
+#define OMAP24XX_ST_SSI_MASK				(1 << 1)
+
+/* CM_IDLEST3_CORE */
+/* 2430 only */
+#define OMAP2430_ST_SDRC_MASK				(1 << 2)
+
+/* CM_IDLEST4_CORE */
+#define OMAP24XX_ST_PKA_SHIFT				4
+#define OMAP24XX_ST_PKA_MASK				(1 << 4)
+#define OMAP24XX_ST_AES_SHIFT				3
+#define OMAP24XX_ST_AES_MASK				(1 << 3)
+#define OMAP24XX_ST_RNG_SHIFT				2
+#define OMAP24XX_ST_RNG_MASK				(1 << 2)
+#define OMAP24XX_ST_SHA_SHIFT				1
+#define OMAP24XX_ST_SHA_MASK				(1 << 1)
+#define OMAP24XX_ST_DES_SHIFT				0
+#define OMAP24XX_ST_DES_MASK				(1 << 0)
+
+/* CM_AUTOIDLE1_CORE */
+#define OMAP24XX_AUTO_CAM_MASK				(1 << 31)
+#define OMAP24XX_AUTO_MAILBOXES_MASK			(1 << 30)
+#define OMAP24XX_AUTO_WDT4_MASK				(1 << 29)
+#define OMAP2420_AUTO_WDT3_MASK				(1 << 28)
+#define OMAP24XX_AUTO_MSPRO_MASK			(1 << 27)
+#define OMAP2420_AUTO_MMC_MASK				(1 << 26)
+#define OMAP24XX_AUTO_FAC_MASK				(1 << 25)
+#define OMAP2420_AUTO_EAC_MASK				(1 << 24)
+#define OMAP24XX_AUTO_HDQ_MASK				(1 << 23)
+#define OMAP24XX_AUTO_UART2_MASK			(1 << 22)
+#define OMAP24XX_AUTO_UART1_MASK			(1 << 21)
+#define OMAP24XX_AUTO_I2C2_MASK				(1 << 20)
+#define OMAP24XX_AUTO_I2C1_MASK				(1 << 19)
+#define OMAP24XX_AUTO_MCSPI2_MASK			(1 << 18)
+#define OMAP24XX_AUTO_MCSPI1_MASK			(1 << 17)
+#define OMAP24XX_AUTO_MCBSP2_MASK			(1 << 16)
+#define OMAP24XX_AUTO_MCBSP1_MASK			(1 << 15)
+#define OMAP24XX_AUTO_GPT12_MASK			(1 << 14)
+#define OMAP24XX_AUTO_GPT11_MASK			(1 << 13)
+#define OMAP24XX_AUTO_GPT10_MASK			(1 << 12)
+#define OMAP24XX_AUTO_GPT9_MASK				(1 << 11)
+#define OMAP24XX_AUTO_GPT8_MASK				(1 << 10)
+#define OMAP24XX_AUTO_GPT7_MASK				(1 << 9)
+#define OMAP24XX_AUTO_GPT6_MASK				(1 << 8)
+#define OMAP24XX_AUTO_GPT5_MASK				(1 << 7)
+#define OMAP24XX_AUTO_GPT4_MASK				(1 << 6)
+#define OMAP24XX_AUTO_GPT3_MASK				(1 << 5)
+#define OMAP24XX_AUTO_GPT2_MASK				(1 << 4)
+#define OMAP2420_AUTO_VLYNQ_MASK			(1 << 3)
+#define OMAP24XX_AUTO_DSS_MASK				(1 << 0)
+
+/* CM_AUTOIDLE2_CORE */
+#define OMAP2430_AUTO_MDM_INTC_MASK			(1 << 11)
+#define OMAP2430_AUTO_GPIO5_MASK			(1 << 10)
+#define OMAP2430_AUTO_MCSPI3_MASK			(1 << 9)
+#define OMAP2430_AUTO_MMCHS2_MASK			(1 << 8)