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@@ -1095,3 +1095,107 @@ static pinmux_enum_t pinmux_data[] = {
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PINMUX_DATA(SDHI0_CMD_MARK, PORT76_FN1),
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PINMUX_DATA(SDHI0_D0_MARK, PORT77_FN1),
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PINMUX_DATA(SDHI0_D1_MARK, PORT78_FN1),
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+ PINMUX_DATA(SDHI0_D2_MARK, PORT79_FN1),
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+ PINMUX_DATA(SDHI0_D3_MARK, PORT80_FN1),
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+
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+ /* Port81 */
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+ PINMUX_DATA(SDHI0_CD_MARK, PORT81_FN1),
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+ PINMUX_DATA(IRQ26_PORT81_MARK, PORT81_FN0, MSEL1CR_26_0),
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+
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+ /* Port82 - Port88 Function */
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+ PINMUX_DATA(SDHI0_CLK_MARK, PORT82_FN1),
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+ PINMUX_DATA(SDHI0_WP_MARK, PORT83_FN1),
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+ PINMUX_DATA(RESETOUTS_MARK, PORT84_FN1),
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+ PINMUX_DATA(USB0_PPON_MARK, PORT85_FN1),
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+ PINMUX_DATA(USB0_OCI_MARK, PORT86_FN1),
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+ PINMUX_DATA(USB1_PPON_MARK, PORT87_FN1),
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+ PINMUX_DATA(USB1_OCI_MARK, PORT88_FN1),
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+
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+ /* Port89 */
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+ PINMUX_DATA(DREQ0_MARK, PORT89_FN1),
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+ PINMUX_DATA(BBIF2_TSCK2_PORT89_MARK, PORT89_FN2, MSEL5CR_0_1),
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+ PINMUX_DATA(RSPI_SSL3_A_MARK, PORT89_FN6),
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+
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+ /* Port90 */
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+ PINMUX_DATA(DACK0_MARK, PORT90_FN1),
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+ PINMUX_DATA(BBIF2_RXD2_PORT90_MARK, PORT90_FN2, MSEL5CR_0_1),
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+ PINMUX_DATA(RSPI_SSL2_A_MARK, PORT90_FN6),
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+ PINMUX_DATA(WAIT_PORT90_MARK, PORT90_FN7, MSEL5CR_2_1),
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+
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+ /* Port91 */
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+ PINMUX_DATA(MEMC_AD0_MARK, PORT91_FN1),
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+ PINMUX_DATA(BBIF1_RXD_MARK, PORT91_FN2),
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+ PINMUX_DATA(SCIFA5_TXD_PORT91_MARK, PORT91_FN3, MSEL5CR_15_1, MSEL5CR_14_0),
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+ PINMUX_DATA(LCD1_D5_MARK, PORT91_FN7),
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+
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+ /* Port92 */
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+ PINMUX_DATA(MEMC_AD1_MARK, PORT92_FN1),
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+ PINMUX_DATA(BBIF1_TSYNC_MARK, PORT92_FN2),
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+ PINMUX_DATA(SCIFA5_RXD_PORT92_MARK, PORT92_FN3, MSEL5CR_15_1, MSEL5CR_14_0),
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+ PINMUX_DATA(STP0_IPD1_MARK, PORT92_FN6),
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+ PINMUX_DATA(LCD1_D6_MARK, PORT92_FN7),
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+
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+ /* Port93 */
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+ PINMUX_DATA(MEMC_AD2_MARK, PORT93_FN1),
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+ PINMUX_DATA(BBIF1_TSCK_MARK, PORT93_FN2),
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+ PINMUX_DATA(SCIFA4_TXD_PORT93_MARK, PORT93_FN3, MSEL5CR_12_1, MSEL5CR_11_0),
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+ PINMUX_DATA(STP0_IPD3_MARK, PORT93_FN6),
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+ PINMUX_DATA(LCD1_D8_MARK, PORT93_FN7),
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+
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+ /* Port94 */
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+ PINMUX_DATA(MEMC_AD3_MARK, PORT94_FN1),
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+ PINMUX_DATA(BBIF1_TXD_MARK, PORT94_FN2),
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+ PINMUX_DATA(SCIFA4_RXD_PORT94_MARK, PORT94_FN3, MSEL5CR_12_1, MSEL5CR_11_0),
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+ PINMUX_DATA(STP0_IPD4_MARK, PORT94_FN6),
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+ PINMUX_DATA(LCD1_D9_MARK, PORT94_FN7),
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+
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+ /* Port95 */
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+ PINMUX_DATA(MEMC_CS1_MARK, PORT95_FN1, MSEL4CR_6_0),
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+ PINMUX_DATA(MEMC_A1_MARK, PORT95_FN1, MSEL4CR_6_1),
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+
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+ PINMUX_DATA(SCIFA2_CTS_MARK, PORT95_FN2),
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+ PINMUX_DATA(SIM_RST_MARK, PORT95_FN4),
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+ PINMUX_DATA(VIO0_D14_PORT95_MARK, PORT95_FN7, MSEL5CR_27_1),
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+ PINMUX_DATA(IRQ22_MARK, PORT95_FN0),
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+
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+ /* Port96 */
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+ PINMUX_DATA(MEMC_ADV_MARK, PORT96_FN1, MSEL4CR_6_0),
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+ PINMUX_DATA(MEMC_DREQ0_MARK, PORT96_FN1, MSEL4CR_6_1),
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+
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+ PINMUX_DATA(SCIFA2_RTS_MARK, PORT96_FN2),
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+ PINMUX_DATA(SIM_CLK_MARK, PORT96_FN4),
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+ PINMUX_DATA(VIO0_D15_PORT96_MARK, PORT96_FN7, MSEL5CR_27_1),
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+ PINMUX_DATA(IRQ23_MARK, PORT96_FN0),
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+
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+ /* Port97 */
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+ PINMUX_DATA(MEMC_AD4_MARK, PORT97_FN1),
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+ PINMUX_DATA(BBIF1_RSCK_MARK, PORT97_FN2),
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+ PINMUX_DATA(LCD1_CS_MARK, PORT97_FN6),
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+ PINMUX_DATA(LCD1_HSYN_MARK, PORT97_FN7),
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+ PINMUX_DATA(IRQ12_PORT97_MARK, PORT97_FN0, MSEL1CR_12_0),
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+
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+ /* Port98 */
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+ PINMUX_DATA(MEMC_AD5_MARK, PORT98_FN1),
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+ PINMUX_DATA(BBIF1_RSYNC_MARK, PORT98_FN2),
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+ PINMUX_DATA(LCD1_VSYN_MARK, PORT98_FN7),
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+ PINMUX_DATA(IRQ13_PORT98_MARK, PORT98_FN0, MSEL1CR_13_0),
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+
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+ /* Port99 */
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+ PINMUX_DATA(MEMC_AD6_MARK, PORT99_FN1),
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+ PINMUX_DATA(BBIF1_FLOW_MARK, PORT99_FN2),
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+ PINMUX_DATA(LCD1_WR_MARK, PORT99_FN6),
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+ PINMUX_DATA(LCD1_DCK_MARK, PORT99_FN7),
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+ PINMUX_DATA(IRQ14_PORT99_MARK, PORT99_FN0, MSEL1CR_14_0),
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+
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+ /* Port100 */
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+ PINMUX_DATA(MEMC_AD7_MARK, PORT100_FN1),
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+ PINMUX_DATA(BBIF1_RX_FLOW_N_MARK, PORT100_FN2),
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+ PINMUX_DATA(LCD1_DON_MARK, PORT100_FN7),
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+ PINMUX_DATA(IRQ15_PORT100_MARK, PORT100_FN0, MSEL1CR_15_0),
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+
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+ /* Port101 */
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+ PINMUX_DATA(FCE0_MARK, PORT101_FN1),
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+
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+ /* Port102 */
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+ PINMUX_DATA(FRB_MARK, PORT102_FN1),
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+ PINMUX_DATA(LCD0_LCLK_PORT102_MARK, PORT102_FN4, MSEL5CR_6_0),
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