|
|
@@ -264,3 +264,53 @@ kprobe_decode_ldmstm(kprobe_opcode_t insn, struct arch_specific_insn *asi);
|
|
|
* 1111, indicating R15 or PC.
|
|
|
*
|
|
|
* As well as checking for legal combinations of registers, this data is also
|
|
|
+ * used to modify the registers encoded in the instructions so that an
|
|
|
+ * emulation routines can use it. (See decode_regs() and INSN_NEW_BITS.)
|
|
|
+ *
|
|
|
+ * Here is a real example which matches ARM instructions of the form
|
|
|
+ * "AND <Rd>,<Rn>,<Rm>,<shift> <Rs>"
|
|
|
+ *
|
|
|
+ * DECODE_EMULATEX (0x0e000090, 0x00000010, emulate_rd12rn16rm0rs8_rwflags,
|
|
|
+ * REGS(ANY, ANY, NOPC, 0, ANY)),
|
|
|
+ * ^ ^ ^ ^
|
|
|
+ * Rn Rd Rs Rm
|
|
|
+ *
|
|
|
+ * Decoding the instruction "AND R4, R5, R6, ASL R15" will be rejected because
|
|
|
+ * Rs == R15
|
|
|
+ *
|
|
|
+ * Decoding the instruction "AND R4, R5, R6, ASL R7" will be accepted and the
|
|
|
+ * instruction will be modified to "AND R0, R2, R3, ASL R1" and then placed into
|
|
|
+ * the kprobes instruction slot. This can then be called later by the handler
|
|
|
+ * function emulate_rd12rn16rm0rs8_rwflags in order to simulate the instruction.
|
|
|
+ */
|
|
|
+
|
|
|
+enum decode_type {
|
|
|
+ DECODE_TYPE_END,
|
|
|
+ DECODE_TYPE_TABLE,
|
|
|
+ DECODE_TYPE_CUSTOM,
|
|
|
+ DECODE_TYPE_SIMULATE,
|
|
|
+ DECODE_TYPE_EMULATE,
|
|
|
+ DECODE_TYPE_OR,
|
|
|
+ DECODE_TYPE_REJECT,
|
|
|
+ NUM_DECODE_TYPES /* Must be last enum */
|
|
|
+};
|
|
|
+
|
|
|
+#define DECODE_TYPE_BITS 4
|
|
|
+#define DECODE_TYPE_MASK ((1 << DECODE_TYPE_BITS) - 1)
|
|
|
+
|
|
|
+enum decode_reg_type {
|
|
|
+ REG_TYPE_NONE = 0, /* Not a register, ignore */
|
|
|
+ REG_TYPE_ANY, /* Any register allowed */
|
|
|
+ REG_TYPE_SAMEAS16, /* Register should be same as that at bits 19..16 */
|
|
|
+ REG_TYPE_SP, /* Register must be SP */
|
|
|
+ REG_TYPE_PC, /* Register must be PC */
|
|
|
+ REG_TYPE_NOSP, /* Register must not be SP */
|
|
|
+ REG_TYPE_NOSPPC, /* Register must not be SP or PC */
|
|
|
+ REG_TYPE_NOPC, /* Register must not be PC */
|
|
|
+ REG_TYPE_NOPCWB, /* No PC if load/store write-back flag also set */
|
|
|
+
|
|
|
+ /* The following types are used when the encoding for PC indicates
|
|
|
+ * another instruction form. This distiction only matters for test
|
|
|
+ * case coverage checks.
|
|
|
+ */
|
|
|
+ REG_TYPE_NOPCX, /* Register must not be PC */
|
王祥