|  | @@ -1300,3 +1300,69 @@ static struct omap_hwmod_opt_clk gpio6_opt_clks[] = {
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				|  |  |  	{ .role = "dbclk", .clk = "gpio6_dbclk" },
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				|  |  |  };
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				|  |  |  
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				|  |  | +static struct omap_hwmod omap44xx_gpio6_hwmod = {
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				|  |  | +	.name		= "gpio6",
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				|  |  | +	.class		= &omap44xx_gpio_hwmod_class,
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				|  |  | +	.clkdm_name	= "l4_per_clkdm",
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				|  |  | +	.flags		= HWMOD_CONTROL_OPT_CLKS_IN_RESET,
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				|  |  | +	.mpu_irqs	= omap44xx_gpio6_irqs,
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				|  |  | +	.main_clk	= "gpio6_ick",
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				|  |  | +	.prcm = {
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				|  |  | +		.omap4 = {
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				|  |  | +			.clkctrl_offs = OMAP4_CM_L4PER_GPIO6_CLKCTRL_OFFSET,
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				|  |  | +			.context_offs = OMAP4_RM_L4PER_GPIO6_CONTEXT_OFFSET,
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				|  |  | +			.modulemode   = MODULEMODE_HWCTRL,
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				|  |  | +		},
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				|  |  | +	},
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				|  |  | +	.opt_clks	= gpio6_opt_clks,
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				|  |  | +	.opt_clks_cnt	= ARRAY_SIZE(gpio6_opt_clks),
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				|  |  | +	.dev_attr	= &gpio_dev_attr,
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				|  |  | +};
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				|  |  | +
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				|  |  | +/*
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				|  |  | + * 'gpmc' class
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				|  |  | + * general purpose memory controller
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				|  |  | + */
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				|  |  | +
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				|  |  | +static struct omap_hwmod_class_sysconfig omap44xx_gpmc_sysc = {
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				|  |  | +	.rev_offs	= 0x0000,
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				|  |  | +	.sysc_offs	= 0x0010,
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				|  |  | +	.syss_offs	= 0x0014,
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				|  |  | +	.sysc_flags	= (SYSC_HAS_AUTOIDLE | SYSC_HAS_SIDLEMODE |
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				|  |  | +			   SYSC_HAS_SOFTRESET | SYSS_HAS_RESET_STATUS),
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				|  |  | +	.idlemodes	= (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART),
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				|  |  | +	.sysc_fields	= &omap_hwmod_sysc_type1,
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				|  |  | +};
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				|  |  | +
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				|  |  | +static struct omap_hwmod_class omap44xx_gpmc_hwmod_class = {
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				|  |  | +	.name	= "gpmc",
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				|  |  | +	.sysc	= &omap44xx_gpmc_sysc,
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				|  |  | +};
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				|  |  | +
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				|  |  | +/* gpmc */
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				|  |  | +static struct omap_hwmod_irq_info omap44xx_gpmc_irqs[] = {
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				|  |  | +	{ .irq = 20 + OMAP44XX_IRQ_GIC_START },
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				|  |  | +	{ .irq = -1 }
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				|  |  | +};
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				|  |  | +
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				|  |  | +static struct omap_hwmod_dma_info omap44xx_gpmc_sdma_reqs[] = {
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				|  |  | +	{ .dma_req = 3 + OMAP44XX_DMA_REQ_START },
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				|  |  | +	{ .dma_req = -1 }
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				|  |  | +};
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				|  |  | +
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				|  |  | +static struct omap_hwmod omap44xx_gpmc_hwmod = {
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				|  |  | +	.name		= "gpmc",
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				|  |  | +	.class		= &omap44xx_gpmc_hwmod_class,
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				|  |  | +	.clkdm_name	= "l3_2_clkdm",
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				|  |  | +	/*
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				|  |  | +	 * XXX HWMOD_INIT_NO_RESET should not be needed for this IP
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				|  |  | +	 * block.  It is not being added due to any known bugs with
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				|  |  | +	 * resetting the GPMC IP block, but rather because any timings
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				|  |  | +	 * set by the bootloader are not being correctly programmed by
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				|  |  | +	 * the kernel from the board file or DT data.
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				|  |  | +	 * HWMOD_INIT_NO_RESET should be removed ASAP.
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				|  |  | +	 */
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				|  |  | +	.flags		= HWMOD_INIT_NO_IDLE | HWMOD_INIT_NO_RESET,
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				|  |  | +	.mpu_irqs	= omap44xx_gpmc_irqs,
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				|  |  | +	.sdma_reqs	= omap44xx_gpmc_sdma_reqs,
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				|  |  | +	.prcm = {
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