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@@ -197,3 +197,23 @@
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#define VERSATILE_SCI1_BASE 0x1000A000
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#define VERSATILE_MMCI1_BASE 0x1000B000 /* MMC Interface */
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/* 0x1000C000 - 0x1000CFFF = reserved */
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+#define VERSATILE_ETH_BASE 0x10010000 /* Ethernet */
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+#define VERSATILE_USB_BASE 0x10020000 /* USB */
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+ /* 0x10030000 - 0x100FFFFF = reserved */
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+#define VERSATILE_SMC_BASE 0x10100000 /* SMC */
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+#define VERSATILE_MPMC_BASE 0x10110000 /* MPMC */
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+#define VERSATILE_CLCD_BASE 0x10120000 /* CLCD */
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+#define VERSATILE_DMAC_BASE 0x10130000 /* DMA controller */
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+#define VERSATILE_VIC_BASE 0x10140000 /* Vectored interrupt controller */
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+#define VERSATILE_PERIPH_BASE 0x10150000 /* off-chip peripherals alias from */
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+ /* 0x10000000 - 0x100FFFFF */
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+#define VERSATILE_AHBM_BASE 0x101D0000 /* AHB monitor */
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+#define VERSATILE_SCTL_BASE 0x101E0000 /* System controller */
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+#define VERSATILE_WATCHDOG_BASE 0x101E1000 /* Watchdog */
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+#define VERSATILE_TIMER0_1_BASE 0x101E2000 /* Timer 0 and 1 */
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+#define VERSATILE_TIMER2_3_BASE 0x101E3000 /* Timer 2 and 3 */
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+#define VERSATILE_GPIO0_BASE 0x101E4000 /* GPIO port 0 */
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+#define VERSATILE_GPIO1_BASE 0x101E5000 /* GPIO port 1 */
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+#define VERSATILE_GPIO2_BASE 0x101E6000 /* GPIO port 2 */
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+#define VERSATILE_GPIO3_BASE 0x101E7000 /* GPIO port 3 */
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+#define VERSATILE_RTC_BASE 0x101E8000 /* Real Time Clock */
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