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@@ -1099,3 +1099,61 @@
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#define PFDE 0x0008 /* Port F DMA Request Enable */
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#define PFDE_UART 0x0000 /* Enable UART0 RX/TX */
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+#define PFDE_DMA 0x0008 /* Enable DMAR1:0 */
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+
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+#define PFTE 0x0010 /* Port F Timer Enable */
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+#define PFTE_UART 0x0000 /* Enable UART1 RX/TX */
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+#define PFTE_TIMER 0x0010 /* Enable TMR7:6 */
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+
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+#define PFS6E 0x0020 /* Port F SPI SSEL 6 Enable */
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+#define PFS6E_TIMER 0x0000 /* Enable TMR5 */
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+#define PFS6E_SPI 0x0020 /* Enable SPI_SSEL6 */
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+
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+#define PFS5E 0x0040 /* Port F SPI SSEL 5 Enable */
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+#define PFS5E_TIMER 0x0000 /* Enable TMR4 */
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+#define PFS5E_SPI 0x0040 /* Enable SPI_SSEL5 */
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+
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+#define PFS4E 0x0080 /* Port F SPI SSEL 4 Enable */
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+#define PFS4E_TIMER 0x0000 /* Enable TMR3 */
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+#define PFS4E_SPI 0x0080 /* Enable SPI_SSEL4 */
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+
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+#define PFFE 0x0100 /* Port F PPI Frame Sync Enable */
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+#define PFFE_TIMER 0x0000 /* Enable TMR2 */
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+#define PFFE_PPI 0x0100 /* Enable PPI FS3 */
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+
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+#define PGSE 0x0200 /* Port G SPORT1 Secondary Enable */
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+#define PGSE_PPI 0x0000 /* Enable PPI D9:8 */
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+#define PGSE_SPORT 0x0200 /* Enable DR1SEC/DT1SEC */
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+
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+#define PGRE 0x0400 /* Port G SPORT1 Receive Enable */
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+#define PGRE_PPI 0x0000 /* Enable PPI D12:10 */
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+#define PGRE_SPORT 0x0400 /* Enable DR1PRI/RFS1/RSCLK1 */
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+
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+#define PGTE 0x0800 /* Port G SPORT1 Transmit Enable */
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+#define PGTE_PPI 0x0000 /* Enable PPI D15:13 */
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+#define PGTE_SPORT 0x0800 /* Enable DT1PRI/TFS1/TSCLK1 */
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+
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+/* entry addresses of the user-callable Boot ROM functions */
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+
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+#define _BOOTROM_RESET 0xEF000000
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+#define _BOOTROM_FINAL_INIT 0xEF000002
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+#define _BOOTROM_DO_MEMORY_DMA 0xEF000006
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+#define _BOOTROM_BOOT_DXE_FLASH 0xEF000008
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+#define _BOOTROM_BOOT_DXE_SPI 0xEF00000A
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+#define _BOOTROM_BOOT_DXE_TWI 0xEF00000C
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+#define _BOOTROM_GET_DXE_ADDRESS_FLASH 0xEF000010
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+#define _BOOTROM_GET_DXE_ADDRESS_SPI 0xEF000012
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+#define _BOOTROM_GET_DXE_ADDRESS_TWI 0xEF000014
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+
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+/* Alternate Deprecated Macros Provided For Backwards Code Compatibility */
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+#define PGDE_UART PFDE_UART
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+#define PGDE_DMA PFDE_DMA
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+#define CKELOW SCKELOW
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+
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+/* ==== end from defBF534.h ==== */
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+
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+/* HOST Port Registers */
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+
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+#define HOST_CONTROL 0xffc03400 /* HOST Control Register */
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+#define HOST_STATUS 0xffc03404 /* HOST Status Register */
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+#define HOST_TIMEOUT 0xffc03408 /* HOST Acknowledge Mode Timeout Register */
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