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@@ -172,3 +172,59 @@ static inline void __iomem *__typesafe_io(unsigned long addr)
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#define PCI_IO_VIRT_BASE 0xfee00000
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extern int pci_ioremap_io(unsigned int offset, phys_addr_t phys_addr);
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+
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+/*
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+ * Now, pick up the machine-defined IO definitions
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+ */
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+#ifdef CONFIG_NEED_MACH_IO_H
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+#include <mach/io.h>
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+#elif defined(CONFIG_PCI)
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+#define IO_SPACE_LIMIT ((resource_size_t)0xfffff)
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+#define __io(a) __typesafe_io(PCI_IO_VIRT_BASE + ((a) & IO_SPACE_LIMIT))
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+#else
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+#define __io(a) __typesafe_io((a) & IO_SPACE_LIMIT)
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+#endif
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+
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+/*
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+ * This is the limit of PC card/PCI/ISA IO space, which is by default
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+ * 64K if we have PC card, PCI or ISA support. Otherwise, default to
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+ * zero to prevent ISA/PCI drivers claiming IO space (and potentially
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+ * oopsing.)
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+ *
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+ * Only set this larger if you really need inb() et.al. to operate over
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+ * a larger address space. Note that SOC_COMMON ioremaps each sockets
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+ * IO space area, and so inb() et.al. must be defined to operate as per
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+ * readb() et.al. on such platforms.
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+ */
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+#ifndef IO_SPACE_LIMIT
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+#if defined(CONFIG_PCMCIA_SOC_COMMON) || defined(CONFIG_PCMCIA_SOC_COMMON_MODULE)
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+#define IO_SPACE_LIMIT ((resource_size_t)0xffffffff)
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+#elif defined(CONFIG_PCI) || defined(CONFIG_ISA) || defined(CONFIG_PCCARD)
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+#define IO_SPACE_LIMIT ((resource_size_t)0xffff)
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+#else
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+#define IO_SPACE_LIMIT ((resource_size_t)0)
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+#endif
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+#endif
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+
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+/*
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+ * IO port access primitives
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+ * -------------------------
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+ *
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+ * The ARM doesn't have special IO access instructions; all IO is memory
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+ * mapped. Note that these are defined to perform little endian accesses
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+ * only. Their primary purpose is to access PCI and ISA peripherals.
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+ *
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+ * Note that for a big endian machine, this implies that the following
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+ * big endian mode connectivity is in place, as described by numerous
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+ * ARM documents:
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+ *
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+ * PCI: D0-D7 D8-D15 D16-D23 D24-D31
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+ * ARM: D24-D31 D16-D23 D8-D15 D0-D7
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+ *
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+ * The machine specific io.h include defines __io to translate an "IO"
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+ * address to a memory address.
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+ *
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+ * Note that we prevent GCC re-ordering or caching values in expressions
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+ * by introducing sequence points into the in*() definitions. Note that
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+ * __raw_* do not guarantee this behaviour.
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+ *
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李欣儒