|  | @@ -163,3 +163,71 @@
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				|  |  |  #define EXYNOS4_IRQ_SYSMMU_FIMC_DRC_0	COMBINER_IRQ(16, 3)
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				|  |  |  #define EXYNOS4_IRQ_SYSMMU_FIMC_FD_0	COMBINER_IRQ(16, 4)
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				|  |  |  #define EXYNOS4_IRQ_SYSMMU_FIMC_CX_0	COMBINER_IRQ(16, 5)
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				|  |  | +
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				|  |  | +#define EXYNOS4_IRQ_FIMD0_FIFO		COMBINER_IRQ(11, 0)
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				|  |  | +#define EXYNOS4_IRQ_FIMD0_VSYNC		COMBINER_IRQ(11, 1)
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				|  |  | +#define EXYNOS4_IRQ_FIMD0_SYSTEM	COMBINER_IRQ(11, 2)
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				|  |  | +
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				|  |  | +#define EXYNOS4_MAX_COMBINER_NR		16
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				|  |  | +
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				|  |  | +#define EXYNOS4_IRQ_GPIO1_NR_GROUPS	16
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				|  |  | +#define EXYNOS4_IRQ_GPIO2_NR_GROUPS	9
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				|  |  | +
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				|  |  | +/*
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				|  |  | + * For Compatibility:
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				|  |  | + * the default is for EXYNOS4, and
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				|  |  | + * for exynos5, should be re-mapped at function
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				|  |  | + */
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				|  |  | +
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				|  |  | +#define IRQ_TIMER0_VIC			EXYNOS4_IRQ_TIMER0_VIC
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				|  |  | +#define IRQ_TIMER1_VIC			EXYNOS4_IRQ_TIMER1_VIC
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				|  |  | +#define IRQ_TIMER2_VIC			EXYNOS4_IRQ_TIMER2_VIC
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				|  |  | +#define IRQ_TIMER3_VIC			EXYNOS4_IRQ_TIMER3_VIC
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				|  |  | +#define IRQ_TIMER4_VIC			EXYNOS4_IRQ_TIMER4_VIC
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				|  |  | +
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				|  |  | +#define IRQ_WDT				EXYNOS4_IRQ_WDT
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				|  |  | +#define IRQ_RTC_ALARM			EXYNOS4_IRQ_RTC_ALARM
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				|  |  | +#define IRQ_RTC_TIC			EXYNOS4_IRQ_RTC_TIC
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				|  |  | +#define IRQ_GPIO_XB			EXYNOS4_IRQ_GPIO_XB
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				|  |  | +#define IRQ_GPIO_XA			EXYNOS4_IRQ_GPIO_XA
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				|  |  | +
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				|  |  | +#define IRQ_IIC				EXYNOS4_IRQ_IIC
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				|  |  | +#define IRQ_IIC1			EXYNOS4_IRQ_IIC1
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				|  |  | +#define IRQ_IIC3			EXYNOS4_IRQ_IIC3
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				|  |  | +#define IRQ_IIC5			EXYNOS4_IRQ_IIC5
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				|  |  | +#define IRQ_IIC6			EXYNOS4_IRQ_IIC6
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				|  |  | +#define IRQ_IIC7			EXYNOS4_IRQ_IIC7
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				|  |  | +
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				|  |  | +#define IRQ_SPI0			EXYNOS4_IRQ_SPI0
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				|  |  | +#define IRQ_SPI1			EXYNOS4_IRQ_SPI1
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				|  |  | +#define IRQ_SPI2			EXYNOS4_IRQ_SPI2
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				|  |  | +
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				|  |  | +#define IRQ_USB_HOST			EXYNOS4_IRQ_USB_HOST
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				|  |  | +#define IRQ_OTG				EXYNOS4_IRQ_USB_HSOTG
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				|  |  | +
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				|  |  | +#define IRQ_HSMMC0			EXYNOS4_IRQ_HSMMC0
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				|  |  | +#define IRQ_HSMMC1			EXYNOS4_IRQ_HSMMC1
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				|  |  | +#define IRQ_HSMMC2			EXYNOS4_IRQ_HSMMC2
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				|  |  | +#define IRQ_HSMMC3			EXYNOS4_IRQ_HSMMC3
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				|  |  | +
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				|  |  | +#define IRQ_MIPI_CSIS0			EXYNOS4_IRQ_MIPI_CSIS0
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				|  |  | +
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				|  |  | +#define IRQ_ONENAND_AUDI		EXYNOS4_IRQ_ONENAND_AUDI
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				|  |  | +
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				|  |  | +#define IRQ_FIMC0			EXYNOS4_IRQ_FIMC0
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				|  |  | +#define IRQ_FIMC1			EXYNOS4_IRQ_FIMC1
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				|  |  | +#define IRQ_FIMC2			EXYNOS4_IRQ_FIMC2
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				|  |  | +#define IRQ_FIMC3			EXYNOS4_IRQ_FIMC3
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				|  |  | +#define IRQ_JPEG			EXYNOS4_IRQ_JPEG
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				|  |  | +#define IRQ_2D				EXYNOS4_IRQ_2D
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				|  |  | +
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				|  |  | +#define IRQ_MIXER			EXYNOS4_IRQ_MIXER
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				|  |  | +#define IRQ_HDMI			EXYNOS4_IRQ_HDMI
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				|  |  | +#define IRQ_IIC_HDMIPHY			EXYNOS4_IRQ_IIC_HDMIPHY
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				|  |  | +#define IRQ_MFC				EXYNOS4_IRQ_MFC
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				|  |  | +#define IRQ_SDO				EXYNOS4_IRQ_SDO
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				|  |  | +
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				|  |  | +#define IRQ_I2S0			EXYNOS4_IRQ_I2S0
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				|  |  | +
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				|  |  | +#define IRQ_ADC				EXYNOS4_IRQ_ADC0
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				|  |  | +#define IRQ_TC				EXYNOS4_IRQ_PEN0
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