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				+/* 
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				+ * OMAP2/3 System Control Module register access 
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				+ * 
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				+ * Copyright (C) 2007, 2012 Texas Instruments, Inc. 
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				+ * Copyright (C) 2007 Nokia Corporation 
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				+ * 
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				+ * Written by Paul Walmsley 
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				+ * 
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				+ * This program is free software; you can redistribute it and/or modify 
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				+ * it under the terms of the GNU General Public License version 2 as 
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				+ * published by the Free Software Foundation. 
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				+ */ 
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				+#undef DEBUG 
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				+ 
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				+#include <linux/kernel.h> 
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				+#include <linux/io.h> 
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				+ 
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				+#include "soc.h" 
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				+#include "iomap.h" 
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				+#include "common.h" 
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				+#include "cm-regbits-34xx.h" 
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				+#include "prm-regbits-34xx.h" 
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				+#include "prm3xxx.h" 
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				+#include "cm3xxx.h" 
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				+#include "sdrc.h" 
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				+#include "pm.h" 
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				+#include "control.h" 
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				+ 
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				+/* Used by omap3_ctrl_save_padconf() */ 
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				+#define START_PADCONF_SAVE		0x2 
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				+#define PADCONF_SAVE_DONE		0x1 
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				+ 
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				+static void __iomem *omap2_ctrl_base; 
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				+static void __iomem *omap4_ctrl_pad_base; 
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				+ 
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				+#if defined(CONFIG_ARCH_OMAP3) && defined(CONFIG_PM) 
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				+struct omap3_scratchpad { 
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				+	u32 boot_config_ptr; 
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				+	u32 public_restore_ptr; 
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				+	u32 secure_ram_restore_ptr; 
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				+	u32 sdrc_module_semaphore; 
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				+	u32 prcm_block_offset; 
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				+	u32 sdrc_block_offset; 
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				+}; 
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				+ 
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				+struct omap3_scratchpad_prcm_block { 
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				+	u32 prm_clksrc_ctrl; 
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				+	u32 prm_clksel; 
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				+	u32 cm_clksel_core; 
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				+	u32 cm_clksel_wkup; 
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				+	u32 cm_clken_pll; 
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				+	u32 cm_autoidle_pll; 
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				+	u32 cm_clksel1_pll; 
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				+	u32 cm_clksel2_pll; 
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				+	u32 cm_clksel3_pll; 
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				+	u32 cm_clken_pll_mpu; 
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				+	u32 cm_autoidle_pll_mpu; 
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				+	u32 cm_clksel1_pll_mpu; 
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				+	u32 cm_clksel2_pll_mpu; 
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				+	u32 prcm_block_size; 
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				+}; 
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				+ 
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				+struct omap3_scratchpad_sdrc_block { 
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				+	u16 sysconfig; 
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				+	u16 cs_cfg; 
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				+	u16 sharing; 
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				+	u16 err_type; 
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				+	u32 dll_a_ctrl; 
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				+	u32 dll_b_ctrl; 
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				+	u32 power; 
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				+	u32 cs_0; 
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				+	u32 mcfg_0; 
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				+	u16 mr_0; 
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				+	u16 emr_1_0; 
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				+	u16 emr_2_0; 
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				+	u16 emr_3_0; 
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				+	u32 actim_ctrla_0; 
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				+	u32 actim_ctrlb_0; 
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				+	u32 rfr_ctrl_0; 
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				+	u32 cs_1; 
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				+	u32 mcfg_1; 
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				+	u16 mr_1; 
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				+	u16 emr_1_1; 
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				+	u16 emr_2_1; 
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				+	u16 emr_3_1; 
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				+	u32 actim_ctrla_1; 
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				+	u32 actim_ctrlb_1; 
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				+	u32 rfr_ctrl_1; 
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				+	u16 dcdl_1_ctrl; 
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				+	u16 dcdl_2_ctrl; 
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				+	u32 flags; 
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				+	u32 block_size; 
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