| 
					
				 | 
			
			
				@@ -231,3 +231,60 @@ 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				 #define OMAP2430_CONTROL_PADCONF_SDMMC2_CMD_OFFSET		0x0cb 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				 #define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT0_OFFSET		0x0cc 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				 #define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT2_OFFSET		0x0cd 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SDMMC2_DAT1_OFFSET		0x0ce 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_UART2_CTS_OFFSET		0x0cf 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_UART2_RTS_OFFSET		0x0d0 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_UART2_TX_OFFSET		0x0d1 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_UART2_RX_OFFSET		0x0d2 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_MCBSP3_CLKX_OFFSET		0x0d3 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_MCBSP3_FSX_OFFSET		0x0d4 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_MCBSP3_DR_OFFSET		0x0d5 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_MCBSP3_DX_OFFSET		0x0d6 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SSI1_DAT_TX_OFFSET		0x0d7 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SSI1_FLAG_TX_OFFSET		0x0d8 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SSI1_RDY_TX_OFFSET		0x0d9 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SSI1_DAT_RX_OFFSET		0x0da 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_GPIO_63_OFFSET			0x0db 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SSI1_FLAG_RX_OFFSET		0x0dc 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SSI1_RDY_RX_OFFSET		0x0dd 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SSI1_WAKE_OFFSET		0x0de 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SPI1_CLK_OFFSET		0x0df 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SPI1_SIMO_OFFSET		0x0e0 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SPI1_SOMI_OFFSET		0x0e1 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SPI1_CS0_OFFSET		0x0e2 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SPI1_CS1_OFFSET		0x0e3 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SPI1_CS2_OFFSET		0x0e4 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SPI1_CS3_OFFSET		0x0e5 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SPI2_CLK_OFFSET		0x0e6 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SPI2_SIMO_OFFSET		0x0e7 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SPI2_SOMI_OFFSET		0x0e8 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SPI2_CS0_OFFSET		0x0e9 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_MCBSP1_CLKR_OFFSET		0x0ea 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_MCBSP1_FSR_OFFSET		0x0eb 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_MCBSP1_DX_OFFSET		0x0ec 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_MCBSP1_DR_OFFSET		0x0ed 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_MCBSP_CLKS_OFFSET		0x0ee 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_MCBSP1_FSX_OFFSET		0x0ef 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_MCBSP1_CLKX_OFFSET		0x0f0 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_I2C1_SCL_OFFSET		0x0f1 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_I2C1_SDA_OFFSET		0x0f2 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_I2C2_SCL_OFFSET		0x0f3 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_I2C2_SDA_OFFSET		0x0f4 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_HDQ_SIO_OFFSET			0x0f5 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_UART3_CTS_RCTX_OFFSET		0x0f6 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_UART3_RTS_SD_OFFSET		0x0f7 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_UART3_TX_IRTX_OFFSET		0x0f8 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_UART3_RX_IRRX_OFFSET		0x0f9 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_GPIO_7_OFFSET			0x0fa 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_GPIO_78_OFFSET			0x0fb 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_GPIO_79_OFFSET			0x0fc 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_GPIO_80_OFFSET			0x0fd 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_GPIO_113_OFFSET		0x0fe 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_GPIO_114_OFFSET		0x0ff 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_GPIO_115_OFFSET		0x100 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_GPIO_116_OFFSET		0x101 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_SYS_DRM_MSECURE_OFFSET		0x102 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA3_OFFSET		0x103 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA4_OFFSET		0x104 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA5_OFFSET		0x105 
			 | 
		
	
		
			
				 | 
				 | 
			
			
				+#define OMAP2430_CONTROL_PADCONF_USB0HS_DATA6_OFFSET		0x106 
			 |