|
@@ -372,3 +372,193 @@
|
|
|
/* Used by CM_WKUP_CLKSTCTRL */
|
|
|
#define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_SHIFT 12
|
|
|
#define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_L4_WKUP_GICLK_MASK (1 << 12)
|
|
|
+
|
|
|
+/* Used by CM_MPU_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_SHIFT 8
|
|
|
+#define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_MPU_DPLL_CLK_MASK (1 << 8)
|
|
|
+
|
|
|
+/* Used by CM1_ABE_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_SHIFT 9
|
|
|
+#define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_OCP_ABE_GICLK_MASK (1 << 9)
|
|
|
+
|
|
|
+/* Used by CM_L4PER_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_SHIFT 16
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_24MC_GFCLK_MASK (1 << 16)
|
|
|
+
|
|
|
+/* Used by CM_L4PER_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_SHIFT 17
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_32K_GFCLK_MASK (1 << 17)
|
|
|
+
|
|
|
+/* Used by CM_L4PER_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_SHIFT 18
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_48M_GFCLK_MASK (1 << 18)
|
|
|
+
|
|
|
+/* Used by CM_L4PER_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_SHIFT 19
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_96M_GFCLK_MASK (1 << 19)
|
|
|
+
|
|
|
+/* Used by CM_L4PER_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_SHIFT 25
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_ABE_24M_GFCLK_MASK (1 << 25)
|
|
|
+
|
|
|
+/* Used by CM_L4PER_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_SHIFT 20
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_MCASP2_GFCLK_MASK (1 << 20)
|
|
|
+
|
|
|
+/* Used by CM_L4PER_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_SHIFT 21
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_MCASP3_GFCLK_MASK (1 << 21)
|
|
|
+
|
|
|
+/* Used by CM_L4PER_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_SHIFT 22
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_MCBSP4_GFCLK_MASK (1 << 22)
|
|
|
+
|
|
|
+/* Used by CM_L4PER_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_SHIFT 24
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_PER_SYS_GFCLK_MASK (1 << 24)
|
|
|
+
|
|
|
+/* Used by CM_MEMIF_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_SHIFT 10
|
|
|
+#define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_PHY_ROOT_CLK_MASK (1 << 10)
|
|
|
+
|
|
|
+/* Used by CM_GFX_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_SGX_GFCLK_SHIFT 9
|
|
|
+#define OMAP4430_CLKACTIVITY_SGX_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_SGX_GFCLK_MASK (1 << 9)
|
|
|
+
|
|
|
+/* Used by CM_ALWON_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_SR_CORE_SYSCLK_SHIFT 11
|
|
|
+#define OMAP4430_CLKACTIVITY_SR_CORE_SYSCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_SR_CORE_SYSCLK_MASK (1 << 11)
|
|
|
+
|
|
|
+/* Used by CM_ALWON_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_SR_IVA_SYSCLK_SHIFT 10
|
|
|
+#define OMAP4430_CLKACTIVITY_SR_IVA_SYSCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_SR_IVA_SYSCLK_MASK (1 << 10)
|
|
|
+
|
|
|
+/* Used by CM_ALWON_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_SR_MPU_SYSCLK_SHIFT 9
|
|
|
+#define OMAP4430_CLKACTIVITY_SR_MPU_SYSCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_SR_MPU_SYSCLK_MASK (1 << 9)
|
|
|
+
|
|
|
+/* Used by CM_WKUP_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_SYS_CLK_SHIFT 8
|
|
|
+#define OMAP4430_CLKACTIVITY_SYS_CLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_SYS_CLK_MASK (1 << 8)
|
|
|
+
|
|
|
+/* Used by CM_TESLA_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_SHIFT 8
|
|
|
+#define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_TESLA_ROOT_CLK_MASK (1 << 8)
|
|
|
+
|
|
|
+/* Used by CM_L3INIT_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_SHIFT 22
|
|
|
+#define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_TLL_CH0_GFCLK_MASK (1 << 22)
|
|
|
+
|
|
|
+/* Used by CM_L3INIT_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_SHIFT 23
|
|
|
+#define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_TLL_CH1_GFCLK_MASK (1 << 23)
|
|
|
+
|
|
|
+/* Used by CM_L3INIT_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_SHIFT 24
|
|
|
+#define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_TLL_CH2_GFCLK_MASK (1 << 24)
|
|
|
+
|
|
|
+/* Used by CM_L3INIT_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_SHIFT 10
|
|
|
+#define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_UNIPRO_DPLL_CLK_MASK (1 << 10)
|
|
|
+
|
|
|
+/* Used by CM_L3INIT_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_SHIFT 14
|
|
|
+#define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_USB_DPLL_CLK_MASK (1 << 14)
|
|
|
+
|
|
|
+/* Used by CM_L3INIT_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_SHIFT 15
|
|
|
+#define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_USB_DPLL_HS_CLK_MASK (1 << 15)
|
|
|
+
|
|
|
+/* Used by CM_WKUP_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_USIM_GFCLK_SHIFT 10
|
|
|
+#define OMAP4430_CLKACTIVITY_USIM_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_USIM_GFCLK_MASK (1 << 10)
|
|
|
+
|
|
|
+/* Used by CM_L3INIT_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_SHIFT 30
|
|
|
+#define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_UTMI_P3_GFCLK_MASK (1 << 30)
|
|
|
+
|
|
|
+/* Used by CM_L3INIT_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_SHIFT 25
|
|
|
+#define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_UTMI_ROOT_GFCLK_MASK (1 << 25)
|
|
|
+
|
|
|
+/* Used by CM_WKUP_CLKSTCTRL */
|
|
|
+#define OMAP4430_CLKACTIVITY_WKUP_32K_GFCLK_SHIFT 11
|
|
|
+#define OMAP4430_CLKACTIVITY_WKUP_32K_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKACTIVITY_WKUP_32K_GFCLK_MASK (1 << 11)
|
|
|
+
|
|
|
+/* Used by CM_WKUP_CLKSTCTRL */
|
|
|
+#define OMAP4460_CLKACTIVITY_WKUP_TS_GFCLK_SHIFT 13
|
|
|
+#define OMAP4460_CLKACTIVITY_WKUP_TS_GFCLK_WIDTH 0x1
|
|
|
+#define OMAP4460_CLKACTIVITY_WKUP_TS_GFCLK_MASK (1 << 13)
|
|
|
+
|
|
|
+/*
|
|
|
+ * Used by CM1_ABE_TIMER5_CLKCTRL, CM1_ABE_TIMER6_CLKCTRL,
|
|
|
+ * CM1_ABE_TIMER7_CLKCTRL, CM1_ABE_TIMER8_CLKCTRL, CM_L3INIT_MMC1_CLKCTRL,
|
|
|
+ * CM_L3INIT_MMC2_CLKCTRL, CM_L4PER_DMTIMER10_CLKCTRL,
|
|
|
+ * CM_L4PER_DMTIMER11_CLKCTRL, CM_L4PER_DMTIMER2_CLKCTRL,
|
|
|
+ * CM_L4PER_DMTIMER3_CLKCTRL, CM_L4PER_DMTIMER4_CLKCTRL,
|
|
|
+ * CM_L4PER_DMTIMER9_CLKCTRL, CM_WKUP_TIMER1_CLKCTRL
|
|
|
+ */
|
|
|
+#define OMAP4430_CLKSEL_SHIFT 24
|
|
|
+#define OMAP4430_CLKSEL_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKSEL_MASK (1 << 24)
|
|
|
+
|
|
|
+/*
|
|
|
+ * Renamed from CLKSEL Used by CM_ABE_DSS_SYS_CLKSEL, CM_ABE_PLL_REF_CLKSEL,
|
|
|
+ * CM_CLKSEL_DUCATI_ISS_ROOT, CM_CLKSEL_USB_60MHZ, CM_L4_WKUP_CLKSEL
|
|
|
+ */
|
|
|
+#define OMAP4430_CLKSEL_0_0_SHIFT 0
|
|
|
+#define OMAP4430_CLKSEL_0_0_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKSEL_0_0_MASK (1 << 0)
|
|
|
+
|
|
|
+/* Renamed from CLKSEL Used by CM_BYPCLK_DPLL_IVA, CM_BYPCLK_DPLL_MPU */
|
|
|
+#define OMAP4430_CLKSEL_0_1_SHIFT 0
|
|
|
+#define OMAP4430_CLKSEL_0_1_WIDTH 0x2
|
|
|
+#define OMAP4430_CLKSEL_0_1_MASK (0x3 << 0)
|
|
|
+
|
|
|
+/* Renamed from CLKSEL Used by CM_L3INIT_HSI_CLKCTRL */
|
|
|
+#define OMAP4430_CLKSEL_24_25_SHIFT 24
|
|
|
+#define OMAP4430_CLKSEL_24_25_WIDTH 0x2
|
|
|
+#define OMAP4430_CLKSEL_24_25_MASK (0x3 << 24)
|
|
|
+
|
|
|
+/* Used by CM_L3INIT_USB_OTG_CLKCTRL */
|
|
|
+#define OMAP4430_CLKSEL_60M_SHIFT 24
|
|
|
+#define OMAP4430_CLKSEL_60M_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKSEL_60M_MASK (1 << 24)
|
|
|
+
|
|
|
+/* Used by CM_MPU_MPU_CLKCTRL */
|
|
|
+#define OMAP4460_CLKSEL_ABE_DIV_MODE_SHIFT 25
|
|
|
+#define OMAP4460_CLKSEL_ABE_DIV_MODE_WIDTH 0x1
|
|
|
+#define OMAP4460_CLKSEL_ABE_DIV_MODE_MASK (1 << 25)
|
|
|
+
|
|
|
+/* Used by CM1_ABE_AESS_CLKCTRL */
|
|
|
+#define OMAP4430_CLKSEL_AESS_FCLK_SHIFT 24
|
|
|
+#define OMAP4430_CLKSEL_AESS_FCLK_WIDTH 0x1
|
|
|
+#define OMAP4430_CLKSEL_AESS_FCLK_MASK (1 << 24)
|