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@@ -203,3 +203,156 @@ static struct powerdomain emu_44xx_pwrdm = {
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static struct powerdomain mpu_44xx_pwrdm = {
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.name = "mpu_pwrdm",
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.voltdm = { .name = "mpu" },
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+ .prcm_offs = OMAP4430_PRM_MPU_INST,
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+ .prcm_partition = OMAP4430_PRM_PARTITION,
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+ .pwrsts = PWRSTS_RET_ON,
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+ .pwrsts_logic_ret = PWRSTS_OFF_RET,
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+ .banks = 3,
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+ .pwrsts_mem_ret = {
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+ [0] = PWRSTS_OFF_RET, /* mpu_l1 */
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+ [1] = PWRSTS_OFF_RET, /* mpu_l2 */
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+ [2] = PWRSTS_RET, /* mpu_ram */
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+ },
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+ .pwrsts_mem_on = {
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+ [0] = PWRSTS_ON, /* mpu_l1 */
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+ [1] = PWRSTS_ON, /* mpu_l2 */
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+ [2] = PWRSTS_ON, /* mpu_ram */
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+ },
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+};
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+
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+/* ivahd_44xx_pwrdm: IVA-HD power domain */
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+static struct powerdomain ivahd_44xx_pwrdm = {
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+ .name = "ivahd_pwrdm",
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+ .voltdm = { .name = "iva" },
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+ .prcm_offs = OMAP4430_PRM_IVAHD_INST,
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+ .prcm_partition = OMAP4430_PRM_PARTITION,
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+ .pwrsts = PWRSTS_OFF_RET_ON,
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+ .pwrsts_logic_ret = PWRSTS_OFF,
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+ .banks = 4,
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+ .pwrsts_mem_ret = {
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+ [0] = PWRSTS_OFF, /* hwa_mem */
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+ [1] = PWRSTS_OFF_RET, /* sl2_mem */
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+ [2] = PWRSTS_OFF_RET, /* tcm1_mem */
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+ [3] = PWRSTS_OFF_RET, /* tcm2_mem */
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+ },
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+ .pwrsts_mem_on = {
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+ [0] = PWRSTS_ON, /* hwa_mem */
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+ [1] = PWRSTS_ON, /* sl2_mem */
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+ [2] = PWRSTS_ON, /* tcm1_mem */
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+ [3] = PWRSTS_ON, /* tcm2_mem */
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+ },
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+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
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+};
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+
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+/* cam_44xx_pwrdm: Camera subsystem power domain */
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+static struct powerdomain cam_44xx_pwrdm = {
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+ .name = "cam_pwrdm",
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+ .voltdm = { .name = "core" },
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+ .prcm_offs = OMAP4430_PRM_CAM_INST,
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+ .prcm_partition = OMAP4430_PRM_PARTITION,
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+ .pwrsts = PWRSTS_OFF_ON,
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+ .banks = 1,
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+ .pwrsts_mem_ret = {
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+ [0] = PWRSTS_OFF, /* cam_mem */
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+ },
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+ .pwrsts_mem_on = {
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+ [0] = PWRSTS_ON, /* cam_mem */
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+ },
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+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
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+};
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+
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+/* l3init_44xx_pwrdm: L3 initators pheripherals power domain */
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+static struct powerdomain l3init_44xx_pwrdm = {
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+ .name = "l3init_pwrdm",
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+ .voltdm = { .name = "core" },
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+ .prcm_offs = OMAP4430_PRM_L3INIT_INST,
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+ .prcm_partition = OMAP4430_PRM_PARTITION,
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+ .pwrsts = PWRSTS_RET_ON,
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+ .pwrsts_logic_ret = PWRSTS_OFF_RET,
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+ .banks = 1,
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+ .pwrsts_mem_ret = {
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+ [0] = PWRSTS_OFF, /* l3init_bank1 */
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+ },
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+ .pwrsts_mem_on = {
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+ [0] = PWRSTS_ON, /* l3init_bank1 */
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+ },
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+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
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+};
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+
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+/* l4per_44xx_pwrdm: Target peripherals power domain */
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+static struct powerdomain l4per_44xx_pwrdm = {
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+ .name = "l4per_pwrdm",
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+ .voltdm = { .name = "core" },
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+ .prcm_offs = OMAP4430_PRM_L4PER_INST,
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+ .prcm_partition = OMAP4430_PRM_PARTITION,
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+ .pwrsts = PWRSTS_RET_ON,
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+ .pwrsts_logic_ret = PWRSTS_OFF_RET,
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+ .banks = 2,
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+ .pwrsts_mem_ret = {
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+ [0] = PWRSTS_OFF, /* nonretained_bank */
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+ [1] = PWRSTS_RET, /* retained_bank */
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+ },
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+ .pwrsts_mem_on = {
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+ [0] = PWRSTS_ON, /* nonretained_bank */
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+ [1] = PWRSTS_ON, /* retained_bank */
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+ },
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+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
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+};
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+
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+/*
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+ * always_on_core_44xx_pwrdm: Always ON logic that sits in VDD_CORE voltage
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+ * domain
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+ */
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+static struct powerdomain always_on_core_44xx_pwrdm = {
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+ .name = "always_on_core_pwrdm",
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+ .voltdm = { .name = "core" },
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+ .prcm_offs = OMAP4430_PRM_ALWAYS_ON_INST,
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+ .prcm_partition = OMAP4430_PRM_PARTITION,
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+ .pwrsts = PWRSTS_ON,
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+};
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+
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+/* cefuse_44xx_pwrdm: Customer efuse controller power domain */
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+static struct powerdomain cefuse_44xx_pwrdm = {
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+ .name = "cefuse_pwrdm",
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+ .voltdm = { .name = "core" },
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+ .prcm_offs = OMAP4430_PRM_CEFUSE_INST,
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+ .prcm_partition = OMAP4430_PRM_PARTITION,
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+ .pwrsts = PWRSTS_OFF_ON,
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+ .flags = PWRDM_HAS_LOWPOWERSTATECHANGE,
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+};
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+
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+/*
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+ * The following power domains are not under SW control
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+ *
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+ * always_on_iva
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+ * always_on_mpu
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+ * stdefuse
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+ */
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+
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+/* As powerdomains are added or removed above, this list must also be changed */
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+static struct powerdomain *powerdomains_omap44xx[] __initdata = {
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+ &core_44xx_pwrdm,
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+ &gfx_44xx_pwrdm,
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+ &abe_44xx_pwrdm,
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+ &dss_44xx_pwrdm,
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+ &tesla_44xx_pwrdm,
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+ &wkup_44xx_pwrdm,
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+ &cpu0_44xx_pwrdm,
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+ &cpu1_44xx_pwrdm,
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+ &emu_44xx_pwrdm,
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+ &mpu_44xx_pwrdm,
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+ &ivahd_44xx_pwrdm,
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+ &cam_44xx_pwrdm,
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+ &l3init_44xx_pwrdm,
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+ &l4per_44xx_pwrdm,
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+ &always_on_core_44xx_pwrdm,
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+ &cefuse_44xx_pwrdm,
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+ NULL
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+};
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+
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+void __init omap44xx_powerdomains_init(void)
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+{
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+ pwrdm_register_platform_funcs(&omap4_pwrdm_operations);
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+ pwrdm_register_pwrdms(powerdomains_omap44xx);
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+ pwrdm_complete_init();
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+}
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