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@@ -358,3 +358,119 @@
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#define RESET_OR_BABLE_B 0x4 /* Reset/babble indicator */
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#define RESET_OR_BABLE_B 0x4 /* Reset/babble indicator */
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#define nRESET_OR_BABLE_B 0x0
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#define nRESET_OR_BABLE_B 0x0
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#define SOF_B 0x8 /* Start of frame */
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#define SOF_B 0x8 /* Start of frame */
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+#define nSOF_B 0x0
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+#define CONN_B 0x10 /* Connection indicator */
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+#define nCONN_B 0x0
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+#define DISCON_B 0x20 /* Disconnect indicator */
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+#define nDISCON_B 0x0
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+#define SESSION_REQ_B 0x40 /* Session Request */
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+#define nSESSION_REQ_B 0x0
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+#define VBUS_ERROR_B 0x80 /* Vbus threshold indicator */
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+#define nVBUS_ERROR_B 0x0
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+
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+/* Bit masks for USB_INTRUSBE */
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+
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+#define SUSPEND_BE 0x1 /* Suspend indicator int enable */
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+#define nSUSPEND_BE 0x0
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+#define RESUME_BE 0x2 /* Resume indicator int enable */
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+#define nRESUME_BE 0x0
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+#define RESET_OR_BABLE_BE 0x4 /* Reset/babble indicator int enable */
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+#define nRESET_OR_BABLE_BE 0x0
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+#define SOF_BE 0x8 /* Start of frame int enable */
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+#define nSOF_BE 0x0
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+#define CONN_BE 0x10 /* Connection indicator int enable */
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+#define nCONN_BE 0x0
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+#define DISCON_BE 0x20 /* Disconnect indicator int enable */
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+#define nDISCON_BE 0x0
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+#define SESSION_REQ_BE 0x40 /* Session Request int enable */
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+#define nSESSION_REQ_BE 0x0
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+#define VBUS_ERROR_BE 0x80 /* Vbus threshold indicator int enable */
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+#define nVBUS_ERROR_BE 0x0
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+
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+/* Bit masks for USB_FRAME */
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+
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+#define FRAME_NUMBER 0x7ff /* Frame number */
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+
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+/* Bit masks for USB_INDEX */
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+
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+#define SELECTED_ENDPOINT 0xf /* selected endpoint */
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+
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+/* Bit masks for USB_GLOBAL_CTL */
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+
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+#define GLOBAL_ENA 0x1 /* enables USB module */
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+#define nGLOBAL_ENA 0x0
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+#define EP1_TX_ENA 0x2 /* Transmit endpoint 1 enable */
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+#define nEP1_TX_ENA 0x0
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+#define EP2_TX_ENA 0x4 /* Transmit endpoint 2 enable */
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+#define nEP2_TX_ENA 0x0
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+#define EP3_TX_ENA 0x8 /* Transmit endpoint 3 enable */
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+#define nEP3_TX_ENA 0x0
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+#define EP4_TX_ENA 0x10 /* Transmit endpoint 4 enable */
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+#define nEP4_TX_ENA 0x0
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+#define EP5_TX_ENA 0x20 /* Transmit endpoint 5 enable */
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+#define nEP5_TX_ENA 0x0
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+#define EP6_TX_ENA 0x40 /* Transmit endpoint 6 enable */
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+#define nEP6_TX_ENA 0x0
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+#define EP7_TX_ENA 0x80 /* Transmit endpoint 7 enable */
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+#define nEP7_TX_ENA 0x0
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+#define EP1_RX_ENA 0x100 /* Receive endpoint 1 enable */
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+#define nEP1_RX_ENA 0x0
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+#define EP2_RX_ENA 0x200 /* Receive endpoint 2 enable */
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+#define nEP2_RX_ENA 0x0
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+#define EP3_RX_ENA 0x400 /* Receive endpoint 3 enable */
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+#define nEP3_RX_ENA 0x0
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+#define EP4_RX_ENA 0x800 /* Receive endpoint 4 enable */
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+#define nEP4_RX_ENA 0x0
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+#define EP5_RX_ENA 0x1000 /* Receive endpoint 5 enable */
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+#define nEP5_RX_ENA 0x0
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+#define EP6_RX_ENA 0x2000 /* Receive endpoint 6 enable */
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+#define nEP6_RX_ENA 0x0
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+#define EP7_RX_ENA 0x4000 /* Receive endpoint 7 enable */
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+#define nEP7_RX_ENA 0x0
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+
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+/* Bit masks for USB_OTG_DEV_CTL */
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+
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+#define SESSION 0x1 /* session indicator */
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+#define nSESSION 0x0
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+#define HOST_REQ 0x2 /* Host negotiation request */
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+#define nHOST_REQ 0x0
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+#define HOST_MODE 0x4 /* indicates USBDRC is a host */
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+#define nHOST_MODE 0x0
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+#define VBUS0 0x8 /* Vbus level indicator[0] */
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+#define nVBUS0 0x0
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+#define VBUS1 0x10 /* Vbus level indicator[1] */
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+#define nVBUS1 0x0
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+#define LSDEV 0x20 /* Low-speed indicator */
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+#define nLSDEV 0x0
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+#define FSDEV 0x40 /* Full or High-speed indicator */
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+#define nFSDEV 0x0
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+#define B_DEVICE 0x80 /* A' or 'B' device indicator */
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+#define nB_DEVICE 0x0
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+
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+/* Bit masks for USB_OTG_VBUS_IRQ */
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+
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+#define DRIVE_VBUS_ON 0x1 /* indicator to drive VBUS control circuit */
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+#define nDRIVE_VBUS_ON 0x0
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+#define DRIVE_VBUS_OFF 0x2 /* indicator to shut off charge pump */
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+#define nDRIVE_VBUS_OFF 0x0
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+#define CHRG_VBUS_START 0x4 /* indicator for external circuit to start charging VBUS */
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+#define nCHRG_VBUS_START 0x0
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+#define CHRG_VBUS_END 0x8 /* indicator for external circuit to end charging VBUS */
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+#define nCHRG_VBUS_END 0x0
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+#define DISCHRG_VBUS_START 0x10 /* indicator to start discharging VBUS */
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+#define nDISCHRG_VBUS_START 0x0
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+#define DISCHRG_VBUS_END 0x20 /* indicator to stop discharging VBUS */
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+#define nDISCHRG_VBUS_END 0x0
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+
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+/* Bit masks for USB_OTG_VBUS_MASK */
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+
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+#define DRIVE_VBUS_ON_ENA 0x1 /* enable DRIVE_VBUS_ON interrupt */
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+#define nDRIVE_VBUS_ON_ENA 0x0
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+#define DRIVE_VBUS_OFF_ENA 0x2 /* enable DRIVE_VBUS_OFF interrupt */
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+#define nDRIVE_VBUS_OFF_ENA 0x0
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+#define CHRG_VBUS_START_ENA 0x4 /* enable CHRG_VBUS_START interrupt */
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+#define nCHRG_VBUS_START_ENA 0x0
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+#define CHRG_VBUS_END_ENA 0x8 /* enable CHRG_VBUS_END interrupt */
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+#define nCHRG_VBUS_END_ENA 0x0
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+#define DISCHRG_VBUS_START_ENA 0x10 /* enable DISCHRG_VBUS_START interrupt */
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+#define nDISCHRG_VBUS_START_ENA 0x0
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