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waterHeterogeneousDataSynchronization connectTheSignalSlot.h 吉超博 commit at 2020-09-22

吉超博 4 years ago
parent
commit
2bd211fc3e

+ 77 - 0
waterHeterogeneousDataSynchronization/monitoringDataProcessing/connectTheSignalSlot.h

@@ -0,0 +1,77 @@
+/*
+ * Blackfin core register bit & address definitions
+ *
+ * Copyright 2005-2008 Analog Devices Inc.
+ *
+ * Licensed under the Clear BSD license or GPL-2 (or later).
+ */
+
+#ifndef _DEF_LPBLACKFIN_H
+#define _DEF_LPBLACKFIN_H
+
+#include <mach/anomaly.h>
+
+#define MK_BMSK_(x) (1<<x)
+#define BFIN_DEPOSIT(mask, x)	(((x) << __ffs(mask)) & (mask))
+#define BFIN_EXTRACT(mask, x)	(((x) & (mask)) >> __ffs(mask))
+
+#ifndef __ASSEMBLY__
+
+#include <linux/types.h>
+
+#if ANOMALY_05000198
+# define NOP_PAD_ANOMALY_05000198 "nop;"
+#else
+# define NOP_PAD_ANOMALY_05000198
+#endif
+
+#define _bfin_readX(addr, size, asm_size, asm_ext) ({ \
+	u32 __v; \
+	__asm__ __volatile__( \
+		NOP_PAD_ANOMALY_05000198 \
+		"%0 = " #asm_size "[%1]" #asm_ext ";" \
+		: "=d" (__v) \
+		: "a" (addr) \
+	); \
+	__v; })
+#define _bfin_writeX(addr, val, size, asm_size) \
+	__asm__ __volatile__( \
+		NOP_PAD_ANOMALY_05000198 \
+		#asm_size "[%0] = %1;" \
+		: \
+		: "a" (addr), "d" ((u##size)(val)) \
+		: "memory" \
+	)
+
+#define bfin_read8(addr)  _bfin_readX(addr,  8, b, (z))
+#define bfin_read16(addr) _bfin_readX(addr, 16, w, (z))
+#define bfin_read32(addr) _bfin_readX(addr, 32,  ,    )
+#define bfin_write8(addr, val)  _bfin_writeX(addr, val,  8, b)
+#define bfin_write16(addr, val) _bfin_writeX(addr, val, 16, w)
+#define bfin_write32(addr, val) _bfin_writeX(addr, val, 32,  )
+
+#define bfin_read(addr) \
+({ \
+	sizeof(*(addr)) == 1 ? bfin_read8(addr)  : \
+	sizeof(*(addr)) == 2 ? bfin_read16(addr) : \
+	sizeof(*(addr)) == 4 ? bfin_read32(addr) : \
+	({ BUG(); 0; }); \
+})
+#define bfin_write(addr, val) \
+do { \
+	switch (sizeof(*(addr))) { \
+	case 1: bfin_write8(addr, val);  break; \
+	case 2: bfin_write16(addr, val); break; \
+	case 4: bfin_write32(addr, val); break; \
+	default: BUG(); \
+	} \
+} while (0)
+
+#define bfin_write_or(addr, bits) \
+do { \
+	typeof(addr) __addr = (addr); \
+	bfin_write(__addr, bfin_read(__addr) | (bits)); \
+} while (0)
+
+#define bfin_write_and(addr, bits) \
+do { \