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+/*
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+ * This file is subject to the terms and conditions of the GNU General Public
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+ * License. See the file "COPYING" in the main directory of this archive
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+ * for more details.
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+ *
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+ * Copyright (C) 1994, 1995 Waldorf GmbH
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+ * Copyright (C) 1994 - 2000, 06 Ralf Baechle
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+ * Copyright (C) 1999, 2000 Silicon Graphics, Inc.
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+ * Copyright (C) 2004, 2005 MIPS Technologies, Inc. All rights reserved.
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+ * Author: Maciej W. Rozycki <macro@mips.com>
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+ */
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+#ifndef _ASM_IO_H
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+#define _ASM_IO_H
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+
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+#include <linux/compiler.h>
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+#include <linux/kernel.h>
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+#include <linux/types.h>
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+#include <linux/irqflags.h>
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+
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+#include <asm/addrspace.h>
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+#include <asm/bug.h>
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+#include <asm/byteorder.h>
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+#include <asm/cpu.h>
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+#include <asm/cpu-features.h>
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+#include <asm-generic/iomap.h>
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+#include <asm/page.h>
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+#include <asm/pgtable-bits.h>
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+#include <asm/processor.h>
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+#include <asm/string.h>
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+
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+#include <ioremap.h>
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+#include <mangle-port.h>
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+
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+/*
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+ * Slowdown I/O port space accesses for antique hardware.
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+ */
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+#undef CONF_SLOWDOWN_IO
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+
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+/*
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+ * Raw operations are never swapped in software. OTOH values that raw
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+ * operations are working on may or may not have been swapped by the bus
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+ * hardware. An example use would be for flash memory that's used for
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+ * execute in place.
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+ */
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+# define __raw_ioswabb(a, x) (x)
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+# define __raw_ioswabw(a, x) (x)
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+# define __raw_ioswabl(a, x) (x)
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+# define __raw_ioswabq(a, x) (x)
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+# define ____raw_ioswabq(a, x) (x)
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+
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+/* ioswab[bwlq], __mem_ioswab[bwlq] are defined in mangle-port.h */
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+
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+#define IO_SPACE_LIMIT 0xffff
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+
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+/*
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+ * On MIPS I/O ports are memory mapped, so we access them using normal
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+ * load/store instructions. mips_io_port_base is the virtual address to
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+ * which all ports are being mapped. For sake of efficiency some code
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+ * assumes that this is an address that can be loaded with a single lui
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+ * instruction, so the lower 16 bits must be zero. Should be true on
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+ * on any sane architecture; generic code does not use this assumption.
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+ */
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+extern const unsigned long mips_io_port_base;
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+
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+/*
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+ * Gcc will generate code to load the value of mips_io_port_base after each
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+ * function call which may be fairly wasteful in some cases. So we don't
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+ * play quite by the book. We tell gcc mips_io_port_base is a long variable
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+ * which solves the code generation issue. Now we need to violate the
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+ * aliasing rules a little to make initialization possible and finally we
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+ * will need the barrier() to fight side effects of the aliasing chat.
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+ * This trickery will eventually collapse under gcc's optimizer. Oh well.
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+ */
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+static inline void set_io_port_base(unsigned long base)
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+{
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+ * (unsigned long *) &mips_io_port_base = base;
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+ barrier();
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+}
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