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@@ -0,0 +1,195 @@
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+/*
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+ * linux/arch/alpha/kernel/core_wildfire.c
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+ *
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+ * Wildfire support.
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+ *
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+ * Copyright (C) 2000 Andrea Arcangeli <andrea@suse.de> SuSE
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+ */
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+
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+#define __EXTERN_INLINE inline
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+#include <asm/io.h>
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+#include <asm/core_wildfire.h>
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+#undef __EXTERN_INLINE
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+
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+#include <linux/types.h>
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+#include <linux/pci.h>
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+#include <linux/sched.h>
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+#include <linux/init.h>
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+
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+#include <asm/ptrace.h>
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+#include <asm/smp.h>
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+
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+#include "proto.h"
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+#include "pci_impl.h"
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+
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+#define DEBUG_CONFIG 0
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+#define DEBUG_DUMP_REGS 0
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+#define DEBUG_DUMP_CONFIG 1
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+
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+#if DEBUG_CONFIG
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+# define DBG_CFG(args) printk args
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+#else
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+# define DBG_CFG(args)
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+#endif
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+
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+#if DEBUG_DUMP_REGS
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+static void wildfire_dump_pci_regs(int qbbno, int hoseno);
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+static void wildfire_dump_pca_regs(int qbbno, int pcano);
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+static void wildfire_dump_qsa_regs(int qbbno);
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+static void wildfire_dump_qsd_regs(int qbbno);
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+static void wildfire_dump_iop_regs(int qbbno);
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+static void wildfire_dump_gp_regs(int qbbno);
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+#endif
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+#if DEBUG_DUMP_CONFIG
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+static void wildfire_dump_hardware_config(void);
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+#endif
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+
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+unsigned char wildfire_hard_qbb_map[WILDFIRE_MAX_QBB];
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+unsigned char wildfire_soft_qbb_map[WILDFIRE_MAX_QBB];
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+#define QBB_MAP_EMPTY 0xff
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+
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+unsigned long wildfire_hard_qbb_mask;
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+unsigned long wildfire_soft_qbb_mask;
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+unsigned long wildfire_gp_mask;
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+unsigned long wildfire_hs_mask;
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+unsigned long wildfire_iop_mask;
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+unsigned long wildfire_ior_mask;
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+unsigned long wildfire_pca_mask;
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+unsigned long wildfire_cpu_mask;
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+unsigned long wildfire_mem_mask;
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+
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+void __init
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+wildfire_init_hose(int qbbno, int hoseno)
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+{
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+ struct pci_controller *hose;
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+ wildfire_pci *pci;
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+
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+ hose = alloc_pci_controller();
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+ hose->io_space = alloc_resource();
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+ hose->mem_space = alloc_resource();
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+
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+ /* This is for userland consumption. */
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+ hose->sparse_mem_base = 0;
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+ hose->sparse_io_base = 0;
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+ hose->dense_mem_base = WILDFIRE_MEM(qbbno, hoseno);
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+ hose->dense_io_base = WILDFIRE_IO(qbbno, hoseno);
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+
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+ hose->config_space_base = WILDFIRE_CONF(qbbno, hoseno);
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+ hose->index = (qbbno << 3) + hoseno;
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+
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+ hose->io_space->start = WILDFIRE_IO(qbbno, hoseno) - WILDFIRE_IO_BIAS;
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+ hose->io_space->end = hose->io_space->start + WILDFIRE_IO_SPACE - 1;
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+ hose->io_space->name = pci_io_names[hoseno];
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+ hose->io_space->flags = IORESOURCE_IO;
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+
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+ hose->mem_space->start = WILDFIRE_MEM(qbbno, hoseno)-WILDFIRE_MEM_BIAS;
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+ hose->mem_space->end = hose->mem_space->start + 0xffffffff;
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+ hose->mem_space->name = pci_mem_names[hoseno];
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+ hose->mem_space->flags = IORESOURCE_MEM;
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+
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+ if (request_resource(&ioport_resource, hose->io_space) < 0)
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+ printk(KERN_ERR "Failed to request IO on qbb %d hose %d\n",
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+ qbbno, hoseno);
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+ if (request_resource(&iomem_resource, hose->mem_space) < 0)
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+ printk(KERN_ERR "Failed to request MEM on qbb %d hose %d\n",
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+ qbbno, hoseno);
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+
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+#if DEBUG_DUMP_REGS
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+ wildfire_dump_pci_regs(qbbno, hoseno);
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+#endif
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+
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+ /*
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+ * Set up the PCI to main memory translation windows.
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+ *
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+ * Note: Window 3 is scatter-gather only
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+ *
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+ * Window 0 is scatter-gather 8MB at 8MB (for isa)
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+ * Window 1 is direct access 1GB at 1GB
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+ * Window 2 is direct access 1GB at 2GB
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+ * Window 3 is scatter-gather 128MB at 3GB
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+ * ??? We ought to scale window 3 memory.
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+ *
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+ */
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+ hose->sg_isa = iommu_arena_new(hose, 0x00800000, 0x00800000, 0);
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+ hose->sg_pci = iommu_arena_new(hose, 0xc0000000, 0x08000000, 0);
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+
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+ pci = WILDFIRE_pci(qbbno, hoseno);
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+
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+ pci->pci_window[0].wbase.csr = hose->sg_isa->dma_base | 3;
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+ pci->pci_window[0].wmask.csr = (hose->sg_isa->size - 1) & 0xfff00000;
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+ pci->pci_window[0].tbase.csr = virt_to_phys(hose->sg_isa->ptes);
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+
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+ pci->pci_window[1].wbase.csr = 0x40000000 | 1;
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+ pci->pci_window[1].wmask.csr = (0x40000000 -1) & 0xfff00000;
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+ pci->pci_window[1].tbase.csr = 0;
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+
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+ pci->pci_window[2].wbase.csr = 0x80000000 | 1;
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+ pci->pci_window[2].wmask.csr = (0x40000000 -1) & 0xfff00000;
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+ pci->pci_window[2].tbase.csr = 0x40000000;
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+
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+ pci->pci_window[3].wbase.csr = hose->sg_pci->dma_base | 3;
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+ pci->pci_window[3].wmask.csr = (hose->sg_pci->size - 1) & 0xfff00000;
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+ pci->pci_window[3].tbase.csr = virt_to_phys(hose->sg_pci->ptes);
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+
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+ wildfire_pci_tbi(hose, 0, 0); /* Flush TLB at the end. */
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+}
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+
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+void __init
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+wildfire_init_pca(int qbbno, int pcano)
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+{
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+
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+ /* Test for PCA existence first. */
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+ if (!WILDFIRE_PCA_EXISTS(qbbno, pcano))
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+ return;
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+
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+#if DEBUG_DUMP_REGS
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+ wildfire_dump_pca_regs(qbbno, pcano);
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+#endif
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+
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+ /* Do both hoses of the PCA. */
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+ wildfire_init_hose(qbbno, (pcano << 1) + 0);
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+ wildfire_init_hose(qbbno, (pcano << 1) + 1);
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+}
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+
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+void __init
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+wildfire_init_qbb(int qbbno)
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+{
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+ int pcano;
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+
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+ /* Test for QBB existence first. */
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+ if (!WILDFIRE_QBB_EXISTS(qbbno))
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+ return;
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+
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+#if DEBUG_DUMP_REGS
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+ wildfire_dump_qsa_regs(qbbno);
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+ wildfire_dump_qsd_regs(qbbno);
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+ wildfire_dump_iop_regs(qbbno);
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+ wildfire_dump_gp_regs(qbbno);
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+#endif
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+
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+ /* Init all PCAs here. */
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+ for (pcano = 0; pcano < WILDFIRE_PCA_PER_QBB; pcano++) {
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+ wildfire_init_pca(qbbno, pcano);
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+ }
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+}
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+
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+void __init
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+wildfire_hardware_probe(void)
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+{
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+ unsigned long temp;
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+ unsigned int hard_qbb, soft_qbb;
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+ wildfire_fast_qsd *fast = WILDFIRE_fast_qsd();
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+ wildfire_qsd *qsd;
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+ wildfire_qsa *qsa;
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+ wildfire_iop *iop;
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+ wildfire_gp *gp;
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+ wildfire_ne *ne;
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+ wildfire_fe *fe;
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+ int i;
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+
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+ temp = fast->qsd_whami.csr;
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+#if 0
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+ printk(KERN_ERR "fast QSD_WHAMI at base %p is 0x%lx\n", fast, temp);
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+#endif
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+
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+ hard_qbb = (temp >> 8) & 7;
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