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@@ -535,3 +535,71 @@ void omap3_cm_restore_context(void)
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/*
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* As per erratum i671, ROM code does not respect the PER DPLL
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* programming scheme if CM_AUTOIDLE_PLL.AUTO_PERIPH_DPLL == 1.
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+ * In this case, we need to restore AUTO_PERIPH_DPLL by ourselves.
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+ */
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+ omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle, PLL_MOD,
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+ CM_AUTOIDLE);
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+ omap2_cm_write_mod_reg(cm_context.pll_cm_autoidle2, PLL_MOD,
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+ CM_AUTOIDLE2);
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+ omap2_cm_write_mod_reg(cm_context.pll_cm_clksel4, PLL_MOD,
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+ OMAP3430ES2_CM_CLKSEL4);
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+ omap2_cm_write_mod_reg(cm_context.pll_cm_clksel5, PLL_MOD,
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+ OMAP3430ES2_CM_CLKSEL5);
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+ omap2_cm_write_mod_reg(cm_context.pll_cm_clken2, PLL_MOD,
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+ OMAP3430ES2_CM_CLKEN2);
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+ __raw_writel(cm_context.cm_polctrl, OMAP3430_CM_POLCTRL);
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+ omap2_cm_write_mod_reg(cm_context.iva2_cm_fclken, OMAP3430_IVA2_MOD,
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+ CM_FCLKEN);
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+ omap2_cm_write_mod_reg(cm_context.iva2_cm_clken_pll, OMAP3430_IVA2_MOD,
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+ OMAP3430_CM_CLKEN_PLL);
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+ omap2_cm_write_mod_reg(cm_context.core_cm_fclken1, CORE_MOD,
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+ CM_FCLKEN1);
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+ omap2_cm_write_mod_reg(cm_context.core_cm_fclken3, CORE_MOD,
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+ OMAP3430ES2_CM_FCLKEN3);
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+ omap2_cm_write_mod_reg(cm_context.sgx_cm_fclken, OMAP3430ES2_SGX_MOD,
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+ CM_FCLKEN);
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+ omap2_cm_write_mod_reg(cm_context.wkup_cm_fclken, WKUP_MOD, CM_FCLKEN);
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+ omap2_cm_write_mod_reg(cm_context.dss_cm_fclken, OMAP3430_DSS_MOD,
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+ CM_FCLKEN);
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+ omap2_cm_write_mod_reg(cm_context.cam_cm_fclken, OMAP3430_CAM_MOD,
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+ CM_FCLKEN);
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+ omap2_cm_write_mod_reg(cm_context.per_cm_fclken, OMAP3430_PER_MOD,
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+ CM_FCLKEN);
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+ omap2_cm_write_mod_reg(cm_context.usbhost_cm_fclken,
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+ OMAP3430ES2_USBHOST_MOD, CM_FCLKEN);
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+ omap2_cm_write_mod_reg(cm_context.core_cm_iclken1, CORE_MOD,
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+ CM_ICLKEN1);
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+ omap2_cm_write_mod_reg(cm_context.core_cm_iclken2, CORE_MOD,
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+ CM_ICLKEN2);
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+ omap2_cm_write_mod_reg(cm_context.core_cm_iclken3, CORE_MOD,
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+ CM_ICLKEN3);
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+ omap2_cm_write_mod_reg(cm_context.sgx_cm_iclken, OMAP3430ES2_SGX_MOD,
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+ CM_ICLKEN);
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+ omap2_cm_write_mod_reg(cm_context.wkup_cm_iclken, WKUP_MOD, CM_ICLKEN);
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+ omap2_cm_write_mod_reg(cm_context.dss_cm_iclken, OMAP3430_DSS_MOD,
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+ CM_ICLKEN);
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+ omap2_cm_write_mod_reg(cm_context.cam_cm_iclken, OMAP3430_CAM_MOD,
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+ CM_ICLKEN);
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+ omap2_cm_write_mod_reg(cm_context.per_cm_iclken, OMAP3430_PER_MOD,
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+ CM_ICLKEN);
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+ omap2_cm_write_mod_reg(cm_context.usbhost_cm_iclken,
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+ OMAP3430ES2_USBHOST_MOD, CM_ICLKEN);
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+ omap2_cm_write_mod_reg(cm_context.iva2_cm_autoidle2, OMAP3430_IVA2_MOD,
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+ CM_AUTOIDLE2);
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+ omap2_cm_write_mod_reg(cm_context.mpu_cm_autoidle2, MPU_MOD,
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+ CM_AUTOIDLE2);
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+ omap2_cm_write_mod_reg(cm_context.iva2_cm_clkstctrl, OMAP3430_IVA2_MOD,
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+ OMAP2_CM_CLKSTCTRL);
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+ omap2_cm_write_mod_reg(cm_context.mpu_cm_clkstctrl, MPU_MOD,
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+ OMAP2_CM_CLKSTCTRL);
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+ omap2_cm_write_mod_reg(cm_context.core_cm_clkstctrl, CORE_MOD,
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+ OMAP2_CM_CLKSTCTRL);
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+ omap2_cm_write_mod_reg(cm_context.sgx_cm_clkstctrl, OMAP3430ES2_SGX_MOD,
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+ OMAP2_CM_CLKSTCTRL);
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+ omap2_cm_write_mod_reg(cm_context.dss_cm_clkstctrl, OMAP3430_DSS_MOD,
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+ OMAP2_CM_CLKSTCTRL);
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+ omap2_cm_write_mod_reg(cm_context.cam_cm_clkstctrl, OMAP3430_CAM_MOD,
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+ OMAP2_CM_CLKSTCTRL);
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+ omap2_cm_write_mod_reg(cm_context.per_cm_clkstctrl, OMAP3430_PER_MOD,
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+ OMAP2_CM_CLKSTCTRL);
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+ omap2_cm_write_mod_reg(cm_context.neon_cm_clkstctrl, OMAP3430_NEON_MOD,
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