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@@ -626,3 +626,109 @@ int vfp_restore_user_hwstate(struct user_vfp __user *ufp,
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return err ? -EFAULT : 0;
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}
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+
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+/*
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+ * VFP hardware can lose all context when a CPU goes offline.
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+ * As we will be running in SMP mode with CPU hotplug, we will save the
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+ * hardware state at every thread switch. We clear our held state when
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+ * a CPU has been killed, indicating that the VFP hardware doesn't contain
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+ * a threads VFP state. When a CPU starts up, we re-enable access to the
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+ * VFP hardware.
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+ *
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+ * Both CPU_DYING and CPU_STARTING are called on the CPU which
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+ * is being offlined/onlined.
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+ */
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+static int vfp_hotplug(struct notifier_block *b, unsigned long action,
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+ void *hcpu)
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+{
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+ if (action == CPU_DYING || action == CPU_DYING_FROZEN) {
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+ vfp_force_reload((long)hcpu, current_thread_info());
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+ } else if (action == CPU_STARTING || action == CPU_STARTING_FROZEN)
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+ vfp_enable(NULL);
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+ return NOTIFY_OK;
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+}
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+
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+/*
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+ * VFP support code initialisation.
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+ */
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+static int __init vfp_init(void)
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+{
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+ unsigned int vfpsid;
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+ unsigned int cpu_arch = cpu_architecture();
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+
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+ if (cpu_arch >= CPU_ARCH_ARMv6)
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+ on_each_cpu(vfp_enable, NULL, 1);
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+
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+ /*
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+ * First check that there is a VFP that we can use.
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+ * The handler is already setup to just log calls, so
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+ * we just need to read the VFPSID register.
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+ */
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+ vfp_vector = vfp_testing_entry;
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+ barrier();
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+ vfpsid = fmrx(FPSID);
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+ barrier();
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+ vfp_vector = vfp_null_entry;
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+
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+ pr_info("VFP support v0.3: ");
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+ if (VFP_arch)
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+ pr_cont("not present\n");
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+ else if (vfpsid & FPSID_NODOUBLE) {
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+ pr_cont("no double precision support\n");
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+ } else {
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+ hotcpu_notifier(vfp_hotplug, 0);
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+
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+ VFP_arch = (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT; /* Extract the architecture version */
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+ pr_cont("implementor %02x architecture %d part %02x variant %x rev %x\n",
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+ (vfpsid & FPSID_IMPLEMENTER_MASK) >> FPSID_IMPLEMENTER_BIT,
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+ (vfpsid & FPSID_ARCH_MASK) >> FPSID_ARCH_BIT,
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+ (vfpsid & FPSID_PART_MASK) >> FPSID_PART_BIT,
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+ (vfpsid & FPSID_VARIANT_MASK) >> FPSID_VARIANT_BIT,
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+ (vfpsid & FPSID_REV_MASK) >> FPSID_REV_BIT);
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+
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+ vfp_vector = vfp_support_entry;
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+
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+ thread_register_notifier(&vfp_notifier_block);
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+ vfp_pm_init();
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+
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+ /*
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+ * We detected VFP, and the support code is
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+ * in place; report VFP support to userspace.
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+ */
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+ elf_hwcap |= HWCAP_VFP;
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+#ifdef CONFIG_VFPv3
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+ if (VFP_arch >= 2) {
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+ elf_hwcap |= HWCAP_VFPv3;
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+
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+ /*
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+ * Check for VFPv3 D16 and VFPv4 D16. CPUs in
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+ * this configuration only have 16 x 64bit
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+ * registers.
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+ */
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+ if (((fmrx(MVFR0) & MVFR0_A_SIMD_MASK)) == 1)
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+ elf_hwcap |= HWCAP_VFPv3D16; /* also v4-D16 */
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+ else
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+ elf_hwcap |= HWCAP_VFPD32;
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+ }
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+#endif
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+ /*
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+ * Check for the presence of the Advanced SIMD
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+ * load/store instructions, integer and single
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+ * precision floating point operations. Only check
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+ * for NEON if the hardware has the MVFR registers.
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+ */
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+ if ((read_cpuid_id() & 0x000f0000) == 0x000f0000) {
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+#ifdef CONFIG_NEON
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+ if ((fmrx(MVFR1) & 0x000fff00) == 0x00011100)
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+ elf_hwcap |= HWCAP_NEON;
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+#endif
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+#ifdef CONFIG_VFPv3
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+ if ((fmrx(MVFR1) & 0xf0000000) == 0x10000000)
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+ elf_hwcap |= HWCAP_VFPv4;
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+#endif
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+ }
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+ }
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+ return 0;
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+}
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+
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+late_initcall(vfp_init);
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