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@@ -181,3 +181,22 @@
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#define DC 0x00080000 /* Deferral Check */
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#define BOLMT 0x00300000 /* Back-Off Limit */
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#define BOLMT_10 0x00000000 /* 10-bit range */
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+#define BOLMT_8 0x00100000 /* 8-bit range */
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+#define BOLMT_4 0x00200000 /* 4-bit range */
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+#define BOLMT_1 0x00300000 /* 1-bit range */
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+#define DRTY 0x00400000 /* Disable TX Retry On Collision */
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+#define LCTRE 0x00800000 /* Enable TX Retry On Late Collision */
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+#define RMII 0x01000000 /* RMII/MII* Mode */
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+#define RMII_10 0x02000000 /* Speed Select for RMII Port (10MBit/100MBit*) */
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+#define FDMODE 0x04000000 /* Duplex Mode Enable (Full/Half*) */
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+#define LB 0x08000000 /* Internal Loopback Enable */
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+#define DRO 0x10000000 /* Disable Receive Own Frames (Half-Duplex Mode) */
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+
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+/* EMAC_STAADD Masks */
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+
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+#define STABUSY 0x00000001 /* Initiate Station Mgt Reg Access / STA Busy Stat */
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+#define STAOP 0x00000002 /* Station Management Operation Code (Write/Read*) */
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+#define STADISPRE 0x00000004 /* Disable Preamble Generation */
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+#define STAIE 0x00000008 /* Station Mgt. Transfer Done Interrupt Enable */
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+#define REGAD 0x000007C0 /* STA Register Address */
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+#define PHYAD 0x0000F800 /* PHY Device Address */
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