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@@ -691,3 +691,160 @@ typedef union pal_mc_error_info_u {
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#define pmci_proc_translation_regs_valid pme_processor.tr
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#define pmci_proc_debug_regs_valid pme_processor.dr
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#define pmci_proc_perf_counters_valid pme_processor.pc
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+#define pmci_proc_control_regs_valid pme_processor.cr
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+#define pmci_proc_machine_check_expected pme_processor.ex
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+#define pmci_proc_machine_check_corrected pme_processor.cm
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+#define pmci_proc_rse_valid pme_processor.rs
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+#define pmci_proc_machine_check_or_init pme_processor.in
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+#define pmci_proc_dynamic_state_valid pme_processor.dy
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+#define pmci_proc_operation pme_processor.op
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+#define pmci_proc_trap_lost pme_processor.tl
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+#define pmci_proc_hardware_damage pme_processor.hd
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+#define pmci_proc_uncontained_storage_damage pme_processor.us
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+#define pmci_proc_machine_check_isolated pme_processor.ci
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+#define pmci_proc_continuable pme_processor.co
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+#define pmci_proc_storage_intergrity_synced pme_processor.sy
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+#define pmci_proc_min_state_save_area_regd pme_processor.mn
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+#define pmci_proc_distinct_multiple_errors pme_processor.me
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+#define pmci_proc_pal_attempted_rendezvous pme_processor.ra
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+#define pmci_proc_pal_rendezvous_complete pme_processor.rz
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+
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+
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+#define pmci_cache_level pme_cache.level
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+#define pmci_cache_line_state pme_cache.mesi
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+#define pmci_cache_line_state_valid pme_cache.mv
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+#define pmci_cache_line_index pme_cache.index
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+#define pmci_cache_instr_cache_fail pme_cache.ic
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+#define pmci_cache_data_cache_fail pme_cache.dc
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+#define pmci_cache_line_tag_fail pme_cache.tl
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+#define pmci_cache_line_data_fail pme_cache.dl
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+#define pmci_cache_operation pme_cache.op
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+#define pmci_cache_way_valid pme_cache.wv
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+#define pmci_cache_target_address_valid pme_cache.tv
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+#define pmci_cache_way pme_cache.way
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+#define pmci_cache_mc pme_cache.mc
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+
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+#define pmci_tlb_instr_translation_cache_fail pme_tlb.itc
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+#define pmci_tlb_data_translation_cache_fail pme_tlb.dtc
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+#define pmci_tlb_instr_translation_reg_fail pme_tlb.itr
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+#define pmci_tlb_data_translation_reg_fail pme_tlb.dtr
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+#define pmci_tlb_translation_reg_slot pme_tlb.tr_slot
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+#define pmci_tlb_mc pme_tlb.mc
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+
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+#define pmci_bus_status_info pme_bus.bsi
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+#define pmci_bus_req_address_valid pme_bus.rq
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+#define pmci_bus_resp_address_valid pme_bus.rp
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+#define pmci_bus_target_address_valid pme_bus.tv
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+#define pmci_bus_error_severity pme_bus.sev
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+#define pmci_bus_transaction_type pme_bus.type
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+#define pmci_bus_cache_cache_transfer pme_bus.cc
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+#define pmci_bus_transaction_size pme_bus.size
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+#define pmci_bus_internal_error pme_bus.ib
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+#define pmci_bus_external_error pme_bus.eb
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+#define pmci_bus_mc pme_bus.mc
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+
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+/*
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+ * NOTE: this min_state_save area struct only includes the 1KB
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+ * architectural state save area. The other 3 KB is scratch space
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+ * for PAL.
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+ */
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+
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+typedef struct pal_min_state_area_s {
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+ u64 pmsa_nat_bits; /* nat bits for saved GRs */
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+ u64 pmsa_gr[15]; /* GR1 - GR15 */
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+ u64 pmsa_bank0_gr[16]; /* GR16 - GR31 */
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+ u64 pmsa_bank1_gr[16]; /* GR16 - GR31 */
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+ u64 pmsa_pr; /* predicate registers */
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+ u64 pmsa_br0; /* branch register 0 */
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+ u64 pmsa_rsc; /* ar.rsc */
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+ u64 pmsa_iip; /* cr.iip */
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+ u64 pmsa_ipsr; /* cr.ipsr */
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+ u64 pmsa_ifs; /* cr.ifs */
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+ u64 pmsa_xip; /* previous iip */
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+ u64 pmsa_xpsr; /* previous psr */
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+ u64 pmsa_xfs; /* previous ifs */
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+ u64 pmsa_br1; /* branch register 1 */
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+ u64 pmsa_reserved[70]; /* pal_min_state_area should total to 1KB */
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+} pal_min_state_area_t;
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+
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+
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+struct ia64_pal_retval {
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+ /*
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+ * A zero status value indicates call completed without error.
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+ * A negative status value indicates reason of call failure.
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+ * A positive status value indicates success but an
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+ * informational value should be printed (e.g., "reboot for
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+ * change to take effect").
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+ */
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+ s64 status;
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+ u64 v0;
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+ u64 v1;
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+ u64 v2;
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+};
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+
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+/*
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+ * Note: Currently unused PAL arguments are generally labeled
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+ * "reserved" so the value specified in the PAL documentation
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+ * (generally 0) MUST be passed. Reserved parameters are not optional
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+ * parameters.
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+ */
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+extern struct ia64_pal_retval ia64_pal_call_static (u64, u64, u64, u64);
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+extern struct ia64_pal_retval ia64_pal_call_stacked (u64, u64, u64, u64);
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+extern struct ia64_pal_retval ia64_pal_call_phys_static (u64, u64, u64, u64);
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+extern struct ia64_pal_retval ia64_pal_call_phys_stacked (u64, u64, u64, u64);
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+extern void ia64_save_scratch_fpregs (struct ia64_fpreg *);
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+extern void ia64_load_scratch_fpregs (struct ia64_fpreg *);
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+
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+#define PAL_CALL(iprv,a0,a1,a2,a3) do { \
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+ struct ia64_fpreg fr[6]; \
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+ ia64_save_scratch_fpregs(fr); \
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+ iprv = ia64_pal_call_static(a0, a1, a2, a3); \
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+ ia64_load_scratch_fpregs(fr); \
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+} while (0)
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+
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+#define PAL_CALL_STK(iprv,a0,a1,a2,a3) do { \
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+ struct ia64_fpreg fr[6]; \
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+ ia64_save_scratch_fpregs(fr); \
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+ iprv = ia64_pal_call_stacked(a0, a1, a2, a3); \
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+ ia64_load_scratch_fpregs(fr); \
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+} while (0)
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+
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+#define PAL_CALL_PHYS(iprv,a0,a1,a2,a3) do { \
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+ struct ia64_fpreg fr[6]; \
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+ ia64_save_scratch_fpregs(fr); \
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+ iprv = ia64_pal_call_phys_static(a0, a1, a2, a3); \
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+ ia64_load_scratch_fpregs(fr); \
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+} while (0)
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+
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+#define PAL_CALL_PHYS_STK(iprv,a0,a1,a2,a3) do { \
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+ struct ia64_fpreg fr[6]; \
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+ ia64_save_scratch_fpregs(fr); \
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+ iprv = ia64_pal_call_phys_stacked(a0, a1, a2, a3); \
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+ ia64_load_scratch_fpregs(fr); \
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+} while (0)
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+
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+typedef int (*ia64_pal_handler) (u64, ...);
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+extern ia64_pal_handler ia64_pal;
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+extern void ia64_pal_handler_init (void *);
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+
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+extern ia64_pal_handler ia64_pal;
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+
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+extern pal_cache_config_info_t l0d_cache_config_info;
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+extern pal_cache_config_info_t l0i_cache_config_info;
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+extern pal_cache_config_info_t l1_cache_config_info;
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+extern pal_cache_config_info_t l2_cache_config_info;
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+
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+extern pal_cache_protection_info_t l0d_cache_protection_info;
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+extern pal_cache_protection_info_t l0i_cache_protection_info;
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+extern pal_cache_protection_info_t l1_cache_protection_info;
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+extern pal_cache_protection_info_t l2_cache_protection_info;
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+
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+extern pal_cache_config_info_t pal_cache_config_info_get(pal_cache_level_t,
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+ pal_cache_type_t);
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+
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+extern pal_cache_protection_info_t pal_cache_protection_info_get(pal_cache_level_t,
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+ pal_cache_type_t);
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+
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+
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+extern void pal_error(int);
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+
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袁开兴