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@@ -363,3 +363,59 @@ struct el_t2_frame_corrected {
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extern inline u8 t2_inb(unsigned long addr)
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extern inline u8 t2_inb(unsigned long addr)
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{
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{
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long result = *(vip) ((addr << 5) + T2_IO + 0x00);
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long result = *(vip) ((addr << 5) + T2_IO + 0x00);
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+ return __kernel_extbl(result, addr & 3);
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+}
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+
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+extern inline void t2_outb(u8 b, unsigned long addr)
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+{
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+ unsigned long w;
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+
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+ w = __kernel_insbl(b, addr & 3);
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+ *(vuip) ((addr << 5) + T2_IO + 0x00) = w;
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+ mb();
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+}
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+
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+extern inline u16 t2_inw(unsigned long addr)
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+{
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+ long result = *(vip) ((addr << 5) + T2_IO + 0x08);
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+ return __kernel_extwl(result, addr & 3);
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+}
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+
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+extern inline void t2_outw(u16 b, unsigned long addr)
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+{
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+ unsigned long w;
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+
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+ w = __kernel_inswl(b, addr & 3);
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+ *(vuip) ((addr << 5) + T2_IO + 0x08) = w;
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+ mb();
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+}
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+
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+extern inline u32 t2_inl(unsigned long addr)
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+{
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+ return *(vuip) ((addr << 5) + T2_IO + 0x18);
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+}
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+
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+extern inline void t2_outl(u32 b, unsigned long addr)
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+{
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+ *(vuip) ((addr << 5) + T2_IO + 0x18) = b;
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+ mb();
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+}
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+
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+
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+/*
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+ * Memory functions.
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+ *
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+ * For reading and writing 8 and 16 bit quantities we need to
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+ * go through one of the three sparse address mapping regions
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+ * and use the HAE_MEM CSR to provide some bits of the address.
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+ * The following few routines use only sparse address region 1
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+ * which gives 1Gbyte of accessible space which relates exactly
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+ * to the amount of PCI memory mapping *into* system address space.
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+ * See p 6-17 of the specification but it looks something like this:
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+ *
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+ * 21164 Address:
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+ *
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+ * 3 2 1
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+ * 9876543210987654321098765432109876543210
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+ * 1ZZZZ0.PCI.QW.Address............BBLL
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+ *
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