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@@ -181,3 +181,184 @@ enum mad_func {
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/*
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* func field for special3 lx opcodes (Cavium Octeon).
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+ */
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+enum lx_func {
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+ lwx_op = 0x00,
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+ lhx_op = 0x04,
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+ lbux_op = 0x06,
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+ ldx_op = 0x08,
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+ lwux_op = 0x10,
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+ lhux_op = 0x14,
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+ lbx_op = 0x16,
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+};
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+
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+/*
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+ * Damn ... bitfields depend from byteorder :-(
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+ */
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+#ifdef __MIPSEB__
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+struct j_format { /* Jump format */
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+ unsigned int opcode : 6;
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+ unsigned int target : 26;
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+};
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+
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+struct i_format { /* Immediate format (addi, lw, ...) */
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+ unsigned int opcode : 6;
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+ unsigned int rs : 5;
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+ unsigned int rt : 5;
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+ signed int simmediate : 16;
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+};
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+
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+struct u_format { /* Unsigned immediate format (ori, xori, ...) */
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+ unsigned int opcode : 6;
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+ unsigned int rs : 5;
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+ unsigned int rt : 5;
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+ unsigned int uimmediate : 16;
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+};
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+
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+struct c_format { /* Cache (>= R6000) format */
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+ unsigned int opcode : 6;
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+ unsigned int rs : 5;
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+ unsigned int c_op : 3;
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+ unsigned int cache : 2;
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+ unsigned int simmediate : 16;
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+};
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+
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+struct r_format { /* Register format */
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+ unsigned int opcode : 6;
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+ unsigned int rs : 5;
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+ unsigned int rt : 5;
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+ unsigned int rd : 5;
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+ unsigned int re : 5;
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+ unsigned int func : 6;
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+};
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+
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+struct p_format { /* Performance counter format (R10000) */
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+ unsigned int opcode : 6;
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+ unsigned int rs : 5;
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+ unsigned int rt : 5;
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+ unsigned int rd : 5;
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+ unsigned int re : 5;
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+ unsigned int func : 6;
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+};
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+
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+struct f_format { /* FPU register format */
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+ unsigned int opcode : 6;
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+ unsigned int : 1;
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+ unsigned int fmt : 4;
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+ unsigned int rt : 5;
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+ unsigned int rd : 5;
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+ unsigned int re : 5;
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+ unsigned int func : 6;
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+};
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+
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+struct ma_format { /* FPU multiply and add format (MIPS IV) */
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+ unsigned int opcode : 6;
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+ unsigned int fr : 5;
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+ unsigned int ft : 5;
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+ unsigned int fs : 5;
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+ unsigned int fd : 5;
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+ unsigned int func : 4;
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+ unsigned int fmt : 2;
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+};
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+
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+struct b_format { /* BREAK and SYSCALL */
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+ unsigned int opcode:6;
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+ unsigned int code:20;
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+ unsigned int func:6;
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+};
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+
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+#elif defined(__MIPSEL__)
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+
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+struct j_format { /* Jump format */
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+ unsigned int target : 26;
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+ unsigned int opcode : 6;
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+};
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+
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+struct i_format { /* Immediate format */
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+ signed int simmediate : 16;
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+ unsigned int rt : 5;
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+ unsigned int rs : 5;
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+ unsigned int opcode : 6;
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+};
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+
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+struct u_format { /* Unsigned immediate format */
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+ unsigned int uimmediate : 16;
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+ unsigned int rt : 5;
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+ unsigned int rs : 5;
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+ unsigned int opcode : 6;
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+};
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+
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+struct c_format { /* Cache (>= R6000) format */
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+ unsigned int simmediate : 16;
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+ unsigned int cache : 2;
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+ unsigned int c_op : 3;
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+ unsigned int rs : 5;
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+ unsigned int opcode : 6;
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+};
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+
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+struct r_format { /* Register format */
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+ unsigned int func : 6;
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+ unsigned int re : 5;
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+ unsigned int rd : 5;
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+ unsigned int rt : 5;
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+ unsigned int rs : 5;
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+ unsigned int opcode : 6;
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+};
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+
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+struct p_format { /* Performance counter format (R10000) */
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+ unsigned int func : 6;
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+ unsigned int re : 5;
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+ unsigned int rd : 5;
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+ unsigned int rt : 5;
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+ unsigned int rs : 5;
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+ unsigned int opcode : 6;
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+};
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+
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+struct f_format { /* FPU register format */
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+ unsigned int func : 6;
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+ unsigned int re : 5;
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+ unsigned int rd : 5;
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+ unsigned int rt : 5;
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+ unsigned int fmt : 4;
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+ unsigned int : 1;
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+ unsigned int opcode : 6;
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+};
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+
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+struct ma_format { /* FPU multiply and add format (MIPS IV) */
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+ unsigned int fmt : 2;
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+ unsigned int func : 4;
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+ unsigned int fd : 5;
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+ unsigned int fs : 5;
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+ unsigned int ft : 5;
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+ unsigned int fr : 5;
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+ unsigned int opcode : 6;
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+};
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+
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+struct b_format { /* BREAK and SYSCALL */
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+ unsigned int func:6;
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+ unsigned int code:20;
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+ unsigned int opcode:6;
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+};
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+
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+#else /* !defined (__MIPSEB__) && !defined (__MIPSEL__) */
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+#error "MIPS but neither __MIPSEL__ nor __MIPSEB__?"
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+#endif
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+
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+union mips_instruction {
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+ unsigned int word;
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+ unsigned short halfword[2];
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+ unsigned char byte[4];
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+ struct j_format j_format;
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+ struct i_format i_format;
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+ struct u_format u_format;
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+ struct c_format c_format;
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+ struct r_format r_format;
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+ struct p_format p_format;
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+ struct f_format f_format;
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+ struct ma_format ma_format;
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+ struct b_format b_format;
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+};
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+
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+/* HACHACHAHCAHC ... */
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+
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+/* In case some other massaging is needed, keep MIPSInst as wrapper */
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