|  | @@ -707,3 +707,130 @@ static pinmux_enum_t pinmux_data[] = {
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				|  |  |  	PORT_DATA_IO_PU_PD(221),
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				|  |  |  	PORT_DATA_IO_PU_PD(222),
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				|  |  |  	PORT_DATA_I_PU_PD(223),
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				|  |  | +	PORT_DATA_I_PU_PD(224),
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				|  |  | +
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				|  |  | +	PORT_DATA_IO_PU_PD(225),
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				|  |  | +	PORT_DATA_O(226),
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				|  |  | +	PORT_DATA_IO_PU_PD(227),
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				|  |  | +	PORT_DATA_I_PU_PD(228),
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				|  |  | +	PORT_DATA_I_PD(229),
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				|  |  | +	PORT_DATA_IO(230),
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				|  |  | +	PORT_DATA_IO_PU_PD(231),
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				|  |  | +	PORT_DATA_IO_PU_PD(232),
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				|  |  | +	PORT_DATA_I_PU_PD(233),
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				|  |  | +	PORT_DATA_IO_PU_PD(234),
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				|  |  | +	PORT_DATA_IO_PU_PD(235),
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				|  |  | +	PORT_DATA_IO_PU_PD(236),
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				|  |  | +	PORT_DATA_IO_PD(237),
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				|  |  | +	PORT_DATA_IO_PU_PD(238),
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				|  |  | +	PORT_DATA_IO_PU_PD(239),
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				|  |  | +	PORT_DATA_IO_PU_PD(240),
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				|  |  | +	PORT_DATA_O(241),
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				|  |  | +	PORT_DATA_I_PD(242),
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				|  |  | +	PORT_DATA_IO_PU_PD(243),
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				|  |  | +	PORT_DATA_IO_PU_PD(244),
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				|  |  | +	PORT_DATA_IO_PU_PD(245),
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				|  |  | +	PORT_DATA_IO_PU_PD(246),
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				|  |  | +	PORT_DATA_IO_PU_PD(247),
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				|  |  | +	PORT_DATA_IO_PU_PD(248),
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				|  |  | +	PORT_DATA_IO_PU_PD(249),
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				|  |  | +	PORT_DATA_IO_PU_PD(250),
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				|  |  | +	PORT_DATA_IO_PU_PD(251),
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				|  |  | +	PORT_DATA_IO_PU_PD(252),
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				|  |  | +	PORT_DATA_IO_PU_PD(253),
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				|  |  | +	PORT_DATA_IO_PU_PD(254),
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				|  |  | +	PORT_DATA_IO_PU_PD(255),
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				|  |  | +	PORT_DATA_IO_PU_PD(256),
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				|  |  | +	PORT_DATA_IO_PU_PD(257),
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				|  |  | +	PORT_DATA_IO_PU_PD(258),
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				|  |  | +	PORT_DATA_IO_PU_PD(259),
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				|  |  | +	PORT_DATA_IO_PU_PD(260),
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				|  |  | +	PORT_DATA_IO_PU_PD(261),
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				|  |  | +	PORT_DATA_IO_PU_PD(262),
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				|  |  | +	PORT_DATA_IO_PU_PD(263),
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				|  |  | +	PORT_DATA_IO_PU_PD(264),
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				|  |  | +	PORT_DATA_IO_PU_PD(265),
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				|  |  | +	PORT_DATA_IO_PU_PD(266),
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				|  |  | +	PORT_DATA_IO_PU_PD(267),
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				|  |  | +	PORT_DATA_IO_PU_PD(268),
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				|  |  | +	PORT_DATA_IO_PU_PD(269),
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				|  |  | +	PORT_DATA_IO_PU_PD(270),
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				|  |  | +	PORT_DATA_IO_PU_PD(271),
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				|  |  | +	PORT_DATA_IO_PU_PD(272),
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				|  |  | +	PORT_DATA_IO_PU_PD(273),
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				|  |  | +	PORT_DATA_IO_PU_PD(274),
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				|  |  | +	PORT_DATA_IO_PU_PD(275),
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				|  |  | +	PORT_DATA_IO_PU_PD(276),
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				|  |  | +	PORT_DATA_IO_PU_PD(277),
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				|  |  | +	PORT_DATA_IO_PU_PD(278),
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				|  |  | +	PORT_DATA_IO_PU_PD(279),
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				|  |  | +	PORT_DATA_IO_PU_PD(280),
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				|  |  | +	PORT_DATA_O(281),
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				|  |  | +	PORT_DATA_O(282),
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				|  |  | +	PORT_DATA_I_PU(288),
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				|  |  | +	PORT_DATA_IO_PU_PD(289),
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				|  |  | +	PORT_DATA_IO_PU_PD(290),
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				|  |  | +	PORT_DATA_IO_PU_PD(291),
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				|  |  | +	PORT_DATA_IO_PU_PD(292),
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				|  |  | +	PORT_DATA_IO_PU_PD(293),
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				|  |  | +	PORT_DATA_IO_PU_PD(294),
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				|  |  | +	PORT_DATA_IO_PU_PD(295),
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				|  |  | +	PORT_DATA_IO_PU_PD(296),
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				|  |  | +	PORT_DATA_IO_PU_PD(297),
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				|  |  | +	PORT_DATA_IO_PU_PD(298),
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				|  |  | +
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				|  |  | +	PORT_DATA_IO_PU_PD(299),
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				|  |  | +	PORT_DATA_IO_PU_PD(300),
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				|  |  | +	PORT_DATA_IO_PU_PD(301),
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				|  |  | +	PORT_DATA_IO_PU_PD(302),
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				|  |  | +	PORT_DATA_IO_PU_PD(303),
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				|  |  | +	PORT_DATA_IO_PU_PD(304),
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				|  |  | +	PORT_DATA_IO_PU_PD(305),
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				|  |  | +	PORT_DATA_O(306),
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				|  |  | +	PORT_DATA_O(307),
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				|  |  | +	PORT_DATA_I_PU(308),
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				|  |  | +	PORT_DATA_O(309),
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				|  |  | +
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				|  |  | +	/* Table 25-1 (Function 0-7) */
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				|  |  | +	PINMUX_DATA(VBUS_0_MARK, PORT0_FN1),
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				|  |  | +	PINMUX_DATA(GPI0_MARK, PORT1_FN1),
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				|  |  | +	PINMUX_DATA(GPI1_MARK, PORT2_FN1),
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				|  |  | +	PINMUX_DATA(GPI2_MARK, PORT3_FN1),
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				|  |  | +	PINMUX_DATA(GPI3_MARK, PORT4_FN1),
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				|  |  | +	PINMUX_DATA(GPI4_MARK, PORT5_FN1),
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				|  |  | +	PINMUX_DATA(GPI5_MARK, PORT6_FN1),
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				|  |  | +	PINMUX_DATA(GPI6_MARK, PORT7_FN1),
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				|  |  | +	PINMUX_DATA(GPI7_MARK, PORT8_FN1),
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				|  |  | +	PINMUX_DATA(SCIFA7_RXD_MARK, PORT12_FN2),
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				|  |  | +	PINMUX_DATA(SCIFA7_CTS__MARK, PORT13_FN2),
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				|  |  | +	PINMUX_DATA(GPO7_MARK, PORT14_FN1), \
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				|  |  | +	PINMUX_DATA(MFG0_OUT2_MARK, PORT14_FN4),
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				|  |  | +	PINMUX_DATA(GPO6_MARK, PORT15_FN1), \
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				|  |  | +	PINMUX_DATA(MFG1_OUT2_MARK, PORT15_FN4),
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				|  |  | +	PINMUX_DATA(GPO5_MARK, PORT16_FN1), \
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				|  |  | +	PINMUX_DATA(SCIFA0_SCK_MARK, PORT16_FN2), \
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				|  |  | +	PINMUX_DATA(FSICOSLDT3_MARK, PORT16_FN3), \
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				|  |  | +	PINMUX_DATA(PORT16_VIO_CKOR_MARK, PORT16_FN4),
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				|  |  | +	PINMUX_DATA(SCIFA0_TXD_MARK, PORT17_FN2),
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				|  |  | +	PINMUX_DATA(SCIFA7_TXD_MARK, PORT18_FN2),
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				|  |  | +	PINMUX_DATA(SCIFA7_RTS__MARK, PORT19_FN2), \
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				|  |  | +	PINMUX_DATA(PORT19_VIO_CKO2_MARK, PORT19_FN3),
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				|  |  | +	PINMUX_DATA(GPO0_MARK, PORT20_FN1),
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				|  |  | +	PINMUX_DATA(GPO1_MARK, PORT21_FN1),
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				|  |  | +	PINMUX_DATA(GPO2_MARK, PORT22_FN1), \
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				|  |  | +	PINMUX_DATA(STATUS0_MARK, PORT22_FN2),
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				|  |  | +	PINMUX_DATA(GPO3_MARK, PORT23_FN1), \
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				|  |  | +	PINMUX_DATA(STATUS1_MARK, PORT23_FN2),
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				|  |  | +	PINMUX_DATA(GPO4_MARK, PORT24_FN1), \
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				|  |  | +	PINMUX_DATA(STATUS2_MARK, PORT24_FN2),
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				|  |  | +	PINMUX_DATA(VINT_MARK, PORT25_FN1),
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				|  |  | +	PINMUX_DATA(TCKON_MARK, PORT26_FN1),
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				|  |  | +	PINMUX_DATA(XDVFS1_MARK, PORT27_FN1), \
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				|  |  | +	PINMUX_DATA(PORT27_I2C_SCL2_MARK, PORT27_FN2, MSEL2CR_MSEL17_0,
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				|  |  | +		MSEL2CR_MSEL16_1), \
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				|  |  | +	PINMUX_DATA(PORT27_I2C_SCL3_MARK, PORT27_FN3, MSEL2CR_MSEL19_0,
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				|  |  | +		MSEL2CR_MSEL18_1), \
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				|  |  | +	PINMUX_DATA(MFG0_OUT1_MARK, PORT27_FN4), \
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				|  |  | +	PINMUX_DATA(PORT27_IROUT_MARK, PORT27_FN7),
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				|  |  | +	PINMUX_DATA(XDVFS2_MARK, PORT28_FN1), \
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				|  |  | +	PINMUX_DATA(PORT28_I2C_SDA2_MARK, PORT28_FN2, MSEL2CR_MSEL17_0,
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