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@@ -453,3 +453,72 @@ static void __init orion5x_setup_pci_wins(struct mbus_dram_target_info *dram)
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* Re-enable decode windows.
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*/
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writel(win_enable, PCI_BAR_ENABLE);
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+
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+ /*
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+ * Disable automatic update of address remapping when writing to BARs.
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+ */
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+ orion5x_setbits(PCI_ADDR_DECODE_CTRL, 1);
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+}
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+
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+static int __init pci_setup(struct pci_sys_data *sys)
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+{
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+ struct resource *res;
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+
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+ /*
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+ * Point PCI unit MBUS decode windows to DRAM space.
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+ */
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+ orion5x_setup_pci_wins(&orion_mbus_dram_info);
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+
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+ /*
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+ * Master + Slave enable
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+ */
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+ orion5x_pci_master_slave_enable();
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+
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+ /*
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+ * Force ordering
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+ */
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+ orion5x_setbits(PCI_CMD, PCI_CMD_HOST_REORDER);
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+
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+ pci_ioremap_io(sys->busnr * SZ_64K, ORION5X_PCI_IO_PHYS_BASE);
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+
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+ /*
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+ * Request resources
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+ */
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+ res = kzalloc(sizeof(struct resource), GFP_KERNEL);
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+ if (!res)
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+ panic("pci_setup unable to alloc resources");
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+
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+ /*
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+ * IORESOURCE_MEM
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+ */
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+ res->name = "PCI Memory Space";
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+ res->flags = IORESOURCE_MEM;
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+ res->start = ORION5X_PCI_MEM_PHYS_BASE;
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+ res->end = res->start + ORION5X_PCI_MEM_SIZE - 1;
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+ if (request_resource(&iomem_resource, res))
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+ panic("Request PCI Memory resource failed\n");
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+ pci_add_resource_offset(&sys->resources, res, sys->mem_offset);
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+
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+ return 1;
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+}
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+
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+
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+/*****************************************************************************
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+ * General PCIe + PCI
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+ ****************************************************************************/
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+static void rc_pci_fixup(struct pci_dev *dev)
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+{
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+ /*
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+ * Prevent enumeration of root complex.
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+ */
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+ if (dev->bus->parent == NULL && dev->devfn == 0) {
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+ int i;
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+
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+ for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
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+ dev->resource[i].start = 0;
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+ dev->resource[i].end = 0;
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+ dev->resource[i].flags = 0;
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+ }
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+ }
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+}
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+DECLARE_PCI_FIXUP_HEADER(PCI_VENDOR_ID_MARVELL, PCI_ANY_ID, rc_pci_fixup);
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