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@@ -162,3 +162,139 @@ struct kvm_vm_data {
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#define KVM_VM_BASE (KVM_VM_DATA_BASE + \
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offsetof(struct kvm_vm_data, kvm_vm_struct))
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#define KVM_MEM_DIRTY_LOG_BASE KVM_VM_DATA_BASE + \
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+ offsetof(struct kvm_vm_data, kvm_mem_dirty_log)
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+
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+#define VHPT_BASE(n) (VCPU_BASE(n) + offsetof(struct kvm_vcpu_data, vcpu_vhpt))
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+#define VTLB_BASE(n) (VCPU_BASE(n) + offsetof(struct kvm_vcpu_data, vcpu_vtlb))
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+#define VPD_BASE(n) (VCPU_BASE(n) + offsetof(struct kvm_vcpu_data, vcpu_vpd))
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+#define VCPU_STRUCT_BASE(n) (VCPU_BASE(n) + \
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+ offsetof(struct kvm_vcpu_data, vcpu_struct))
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+
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+/*IO section definitions*/
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+#define IOREQ_READ 1
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+#define IOREQ_WRITE 0
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+
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+#define STATE_IOREQ_NONE 0
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+#define STATE_IOREQ_READY 1
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+#define STATE_IOREQ_INPROCESS 2
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+#define STATE_IORESP_READY 3
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+
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+/*Guest Physical address layout.*/
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+#define GPFN_MEM (0UL << 60) /* Guest pfn is normal mem */
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+#define GPFN_FRAME_BUFFER (1UL << 60) /* VGA framebuffer */
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+#define GPFN_LOW_MMIO (2UL << 60) /* Low MMIO range */
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+#define GPFN_PIB (3UL << 60) /* PIB base */
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+#define GPFN_IOSAPIC (4UL << 60) /* IOSAPIC base */
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+#define GPFN_LEGACY_IO (5UL << 60) /* Legacy I/O base */
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+#define GPFN_GFW (6UL << 60) /* Guest Firmware */
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+#define GPFN_PHYS_MMIO (7UL << 60) /* Directed MMIO Range */
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+
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+#define GPFN_IO_MASK (7UL << 60) /* Guest pfn is I/O type */
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+#define GPFN_INV_MASK (1UL << 63) /* Guest pfn is invalid */
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+#define INVALID_MFN (~0UL)
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+#define MEM_G (1UL << 30)
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+#define MEM_M (1UL << 20)
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+#define MMIO_START (3 * MEM_G)
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+#define MMIO_SIZE (512 * MEM_M)
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+#define VGA_IO_START 0xA0000UL
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+#define VGA_IO_SIZE 0x20000
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+#define LEGACY_IO_START (MMIO_START + MMIO_SIZE)
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+#define LEGACY_IO_SIZE (64 * MEM_M)
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+#define IO_SAPIC_START 0xfec00000UL
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+#define IO_SAPIC_SIZE 0x100000
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+#define PIB_START 0xfee00000UL
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+#define PIB_SIZE 0x200000
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+#define GFW_START (4 * MEM_G - 16 * MEM_M)
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+#define GFW_SIZE (16 * MEM_M)
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+
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+/*Deliver mode, defined for ioapic.c*/
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+#define dest_Fixed IOSAPIC_FIXED
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+#define dest_LowestPrio IOSAPIC_LOWEST_PRIORITY
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+
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+#define NMI_VECTOR 2
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+#define ExtINT_VECTOR 0
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+#define NULL_VECTOR (-1)
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+#define IA64_SPURIOUS_INT_VECTOR 0x0f
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+
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+#define VCPU_LID(v) (((u64)(v)->vcpu_id) << 24)
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+
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+/*
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+ *Delivery mode
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+ */
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+#define SAPIC_DELIV_SHIFT 8
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+#define SAPIC_FIXED 0x0
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+#define SAPIC_LOWEST_PRIORITY 0x1
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+#define SAPIC_PMI 0x2
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+#define SAPIC_NMI 0x4
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+#define SAPIC_INIT 0x5
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+#define SAPIC_EXTINT 0x7
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+
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+/*
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+ * vcpu->requests bit members for arch
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+ */
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+#define KVM_REQ_PTC_G 32
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+#define KVM_REQ_RESUME 33
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+
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+#define KVM_HPAGE_GFN_SHIFT(x) 0
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+#define KVM_NR_PAGE_SIZES 1
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+#define KVM_PAGES_PER_HPAGE(x) 1
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+
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+struct kvm;
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+struct kvm_vcpu;
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+
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+struct kvm_mmio_req {
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+ uint64_t addr; /* physical address */
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+ uint64_t size; /* size in bytes */
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+ uint64_t data; /* data (or paddr of data) */
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+ uint8_t state:4;
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+ uint8_t dir:1; /* 1=read, 0=write */
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+};
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+
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+/*Pal data struct */
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+struct kvm_pal_call{
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+ /*In area*/
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+ uint64_t gr28;
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+ uint64_t gr29;
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+ uint64_t gr30;
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+ uint64_t gr31;
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+ /*Out area*/
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+ struct ia64_pal_retval ret;
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+};
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+
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+/* Sal data structure */
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+struct kvm_sal_call{
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+ /*In area*/
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+ uint64_t in0;
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+ uint64_t in1;
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+ uint64_t in2;
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+ uint64_t in3;
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+ uint64_t in4;
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+ uint64_t in5;
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+ uint64_t in6;
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+ uint64_t in7;
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+ struct sal_ret_values ret;
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+};
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+
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+/*Guest change rr6*/
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+struct kvm_switch_rr6 {
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+ uint64_t old_rr;
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+ uint64_t new_rr;
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+};
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+
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+union ia64_ipi_a{
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+ unsigned long val;
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+ struct {
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+ unsigned long rv : 3;
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+ unsigned long ir : 1;
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+ unsigned long eid : 8;
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+ unsigned long id : 8;
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+ unsigned long ib_base : 44;
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+ };
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+};
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+
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+union ia64_ipi_d {
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+ unsigned long val;
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+ struct {
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+ unsigned long vector : 8;
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+ unsigned long dm : 3;
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+ unsigned long ig : 53;
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