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@@ -242,3 +242,69 @@ static inline int vfp_single_type(struct vfp_single *s)
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type |= VFP_DENORMAL;
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}
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return type;
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+}
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+
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+#ifndef DEBUG
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+#define vfp_single_normaliseround(sd,vsd,fpscr,except,func) __vfp_single_normaliseround(sd,vsd,fpscr,except)
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+u32 __vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exceptions);
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+#else
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+u32 vfp_single_normaliseround(int sd, struct vfp_single *vs, u32 fpscr, u32 exceptions, const char *func);
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+#endif
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+
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+/*
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+ * Double-precision
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+ */
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+struct vfp_double {
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+ s16 exponent;
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+ u16 sign;
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+ u64 significand;
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+};
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+
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+/*
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+ * VFP_REG_ZERO is a special register number for vfp_get_double
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+ * which returns (double)0.0. This is useful for the compare with
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+ * zero instructions.
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+ */
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+#ifdef CONFIG_VFPv3
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+#define VFP_REG_ZERO 32
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+#else
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+#define VFP_REG_ZERO 16
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+#endif
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+extern u64 vfp_get_double(unsigned int reg);
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+extern void vfp_put_double(u64 val, unsigned int reg);
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+
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+#define VFP_DOUBLE_MANTISSA_BITS (52)
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+#define VFP_DOUBLE_EXPONENT_BITS (11)
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+#define VFP_DOUBLE_LOW_BITS (64 - VFP_DOUBLE_MANTISSA_BITS - 2)
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+#define VFP_DOUBLE_LOW_BITS_MASK ((1 << VFP_DOUBLE_LOW_BITS) - 1)
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+
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+/*
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+ * The bit in an unpacked double which indicates that it is a quiet NaN
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+ */
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+#define VFP_DOUBLE_SIGNIFICAND_QNAN (1ULL << (VFP_DOUBLE_MANTISSA_BITS - 1 + VFP_DOUBLE_LOW_BITS))
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+
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+/*
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+ * Operations on packed single-precision numbers
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+ */
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+#define vfp_double_packed_sign(v) ((v) & (1ULL << 63))
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+#define vfp_double_packed_negate(v) ((v) ^ (1ULL << 63))
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+#define vfp_double_packed_abs(v) ((v) & ~(1ULL << 63))
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+#define vfp_double_packed_exponent(v) (((v) >> VFP_DOUBLE_MANTISSA_BITS) & ((1 << VFP_DOUBLE_EXPONENT_BITS) - 1))
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+#define vfp_double_packed_mantissa(v) ((v) & ((1ULL << VFP_DOUBLE_MANTISSA_BITS) - 1))
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+
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+/*
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+ * Unpack a double-precision float. Note that this returns the magnitude
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+ * of the double-precision float mantissa with the 1. if necessary,
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+ * aligned to bit 62.
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+ */
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+static inline void vfp_double_unpack(struct vfp_double *s, s64 val)
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+{
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+ u64 significand;
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+
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+ s->sign = vfp_double_packed_sign(val) >> 48;
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+ s->exponent = vfp_double_packed_exponent(val);
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+
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+ significand = (u64) val;
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+ significand = (significand << (64 - VFP_DOUBLE_MANTISSA_BITS)) >> 2;
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+ if (s->exponent && s->exponent != 2047)
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+ significand |= (1ULL << 62);
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