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@@ -392,3 +392,83 @@ static struct clk clk_tin[] = {
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.ops = &clk_tin_ops,
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},
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[3] = {
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+ .name = "pwm-tin",
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+ .devname = "s3c24xx-pwm.3",
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+ .id = 3,
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+ .ops = &clk_tin_ops,
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+ },
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+ [4] = {
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+ .name = "pwm-tin",
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+ .devname = "s3c24xx-pwm.4",
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+ .id = 4,
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+ .ops = &clk_tin_ops,
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+ },
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+};
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+
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+static __init int clk_pwm_tin_register(struct clk *pwm)
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+{
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+ unsigned long tcfg1 = __raw_readl(S3C2410_TCFG1);
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+ unsigned int id = pwm->id;
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+
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+ struct clk *parent;
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+ int ret;
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+
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+ ret = s3c24xx_register_clock(pwm);
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+ if (ret < 0)
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+ return ret;
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+
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+ tcfg1 >>= S3C2410_TCFG1_SHIFT(id);
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+ tcfg1 &= S3C2410_TCFG1_MUX_MASK;
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+
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+ if (pwm_cfg_src_is_tclk(tcfg1))
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+ parent = s3c24xx_pwmclk_tclk(id);
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+ else
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+ parent = s3c24xx_pwmclk_tdiv(id);
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+
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+ return clk_set_parent(pwm, parent);
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+}
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+
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+/**
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+ * s3c_pwmclk_init() - initialise pwm clocks
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+ *
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+ * Initialise and register the clocks which provide the inputs for the
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+ * pwm timer blocks.
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+ *
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+ * Note, this call is required by the time core, so must be called after
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+ * the base clocks are added and before any of the initcalls are run.
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+ */
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+__init void s3c_pwmclk_init(void)
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+{
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+ struct clk *clk_timers;
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+ unsigned int clk;
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+ int ret;
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+
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+ clk_timers = clk_get(NULL, "timers");
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+ if (IS_ERR(clk_timers)) {
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+ printk(KERN_ERR "%s: no parent clock\n", __func__);
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+ return;
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+ }
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+
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+ for (clk = 0; clk < ARRAY_SIZE(clk_timer_scaler); clk++)
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+ clk_timer_scaler[clk].parent = clk_timers;
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+
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+ s3c_register_clocks(clk_timer_scaler, ARRAY_SIZE(clk_timer_scaler));
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+ s3c_register_clocks(clk_timer_tclk, ARRAY_SIZE(clk_timer_tclk));
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+
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+ for (clk = 0; clk < ARRAY_SIZE(clk_timer_tdiv); clk++) {
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+ ret = clk_pwm_tdiv_register(clk);
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+
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+ if (ret < 0) {
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+ printk(KERN_ERR "error adding pwm%d tdiv clock\n", clk);
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+ return;
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+ }
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+ }
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+
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+ for (clk = 0; clk < ARRAY_SIZE(clk_tin); clk++) {
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+ ret = clk_pwm_tin_register(&clk_tin[clk]);
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+ if (ret < 0) {
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+ printk(KERN_ERR "error adding pwm%d tin clock\n", clk);
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+ return;
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+ }
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+ }
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+}
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