|
|
@@ -351,3 +351,59 @@ struct el_TITAN_sysdata_mcheck {
|
|
|
struct el_PRIVATEER_envdata_mcheck {
|
|
|
u64 summary; /* 0x00 */
|
|
|
u64 c_dirx; /* 0x08 */
|
|
|
+ u64 smir; /* 0x10 */
|
|
|
+ u64 cpuir; /* 0x18 */
|
|
|
+ u64 psir; /* 0x20 */
|
|
|
+ u64 fault; /* 0x28 */
|
|
|
+ u64 sys_doors; /* 0x30 */
|
|
|
+ u64 temp_warn; /* 0x38 */
|
|
|
+ u64 fan_ctrl; /* 0x40 */
|
|
|
+ u64 code; /* 0x48 */
|
|
|
+ u64 reserved; /* 0x50 */
|
|
|
+};
|
|
|
+
|
|
|
+#ifdef __KERNEL__
|
|
|
+
|
|
|
+#ifndef __EXTERN_INLINE
|
|
|
+#define __EXTERN_INLINE extern inline
|
|
|
+#define __IO_EXTERN_INLINE
|
|
|
+#endif
|
|
|
+
|
|
|
+/*
|
|
|
+ * I/O functions:
|
|
|
+ *
|
|
|
+ * TITAN, a 21??? PCI/memory support chipset for the EV6 (21264)
|
|
|
+ * can only use linear accesses to get at PCI/AGP memory and I/O spaces.
|
|
|
+ */
|
|
|
+
|
|
|
+/*
|
|
|
+ * Memory functions. all accesses are done through linear space.
|
|
|
+ */
|
|
|
+extern void __iomem *titan_ioportmap(unsigned long addr);
|
|
|
+extern void __iomem *titan_ioremap(unsigned long addr, unsigned long size);
|
|
|
+extern void titan_iounmap(volatile void __iomem *addr);
|
|
|
+
|
|
|
+__EXTERN_INLINE int titan_is_ioaddr(unsigned long addr)
|
|
|
+{
|
|
|
+ return addr >= TITAN_BASE;
|
|
|
+}
|
|
|
+
|
|
|
+extern int titan_is_mmio(const volatile void __iomem *addr);
|
|
|
+
|
|
|
+#undef __IO_PREFIX
|
|
|
+#define __IO_PREFIX titan
|
|
|
+#define titan_trivial_rw_bw 1
|
|
|
+#define titan_trivial_rw_lq 1
|
|
|
+#define titan_trivial_io_bw 1
|
|
|
+#define titan_trivial_io_lq 1
|
|
|
+#define titan_trivial_iounmap 0
|
|
|
+#include <asm/io_trivial.h>
|
|
|
+
|
|
|
+#ifdef __IO_EXTERN_INLINE
|
|
|
+#undef __EXTERN_INLINE
|
|
|
+#undef __IO_EXTERN_INLINE
|
|
|
+#endif
|
|
|
+
|
|
|
+#endif /* __KERNEL__ */
|
|
|
+
|
|
|
+#endif /* __ALPHA_TITAN__H__ */
|
