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@@ -723,3 +723,57 @@ static struct vpbe_config dm644xevm_display_cfg = {
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};
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};
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static struct platform_device *davinci_evm_devices[] __initdata = {
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static struct platform_device *davinci_evm_devices[] __initdata = {
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+ &davinci_fb_device,
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+ &rtc_dev,
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+};
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+
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+static struct davinci_uart_config uart_config __initdata = {
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+ .enabled_uarts = (1 << 0),
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+};
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+
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+static void __init
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+davinci_evm_map_io(void)
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+{
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+ dm644x_init();
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+}
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+
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+static int davinci_phy_fixup(struct phy_device *phydev)
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+{
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+ unsigned int control;
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+ /* CRITICAL: Fix for increasing PHY signal drive strength for
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+ * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
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+ * signal strength was low causing TX to fail randomly. The
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+ * fix is to Set bit 11 (Increased MII drive strength) of PHY
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+ * register 26 (Digital Config register) on this phy. */
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+ control = phy_read(phydev, 26);
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+ phy_write(phydev, 26, (control | 0x800));
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+ return 0;
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+}
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+
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+#if defined(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
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+ defined(CONFIG_BLK_DEV_PALMCHIP_BK3710_MODULE)
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+#define HAS_ATA 1
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+#else
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+#define HAS_ATA 0
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+#endif
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+
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+#if defined(CONFIG_MTD_PHYSMAP) || \
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+ defined(CONFIG_MTD_PHYSMAP_MODULE)
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+#define HAS_NOR 1
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+#else
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+#define HAS_NOR 0
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+#endif
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+
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+#if defined(CONFIG_MTD_NAND_DAVINCI) || \
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+ defined(CONFIG_MTD_NAND_DAVINCI_MODULE)
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+#define HAS_NAND 1
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+#else
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+#define HAS_NAND 0
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+#endif
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+
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+static __init void davinci_evm_init(void)
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+{
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+ struct clk *aemif_clk;
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+ struct davinci_soc_info *soc_info = &davinci_soc_info;
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+
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+ aemif_clk = clk_get(NULL, "aemif");
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