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@@ -310,3 +310,109 @@ typedef union pal_cache_line_id_u {
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start : 8, /* 47-40 lsb of data to
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* invert
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*/
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+ length : 8, /* 55-48 #bits to
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+ * invert
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+ */
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+ trigger : 8; /* 63-56 Trigger error
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+ * by doing a load
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+ * after the write
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+ */
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+
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+ } pclid_info_write;
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+} pal_cache_line_id_u_t;
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+
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+#define pclid_read_part pclid_info_read.part
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+#define pclid_read_way pclid_info_read.way
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+#define pclid_read_level pclid_info_read.level
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+#define pclid_read_cache_type pclid_info_read.cache_type
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+
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+#define pclid_write_trigger pclid_info_write.trigger
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+#define pclid_write_length pclid_info_write.length
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+#define pclid_write_start pclid_info_write.start
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+#define pclid_write_mesi pclid_info_write.mesi
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+#define pclid_write_part pclid_info_write.part
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+#define pclid_write_way pclid_info_write.way
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+#define pclid_write_level pclid_info_write.level
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+#define pclid_write_cache_type pclid_info_write.cache_type
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+
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+/* Processor cache line part encodings */
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+#define PAL_CACHE_LINE_ID_PART_DATA 0 /* Data */
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+#define PAL_CACHE_LINE_ID_PART_TAG 1 /* Tag */
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+#define PAL_CACHE_LINE_ID_PART_DATA_PROT 2 /* Data protection */
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+#define PAL_CACHE_LINE_ID_PART_TAG_PROT 3 /* Tag protection */
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+#define PAL_CACHE_LINE_ID_PART_DATA_TAG_PROT 4 /* Data+tag
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+ * protection
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+ */
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+typedef struct pal_cache_line_info_s {
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+ pal_status_t pcli_status; /* Return status of the read cache line
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+ * info call.
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+ */
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+ u64 pcli_data; /* 64-bit data, tag, protection bits .. */
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+ u64 pcli_data_len; /* data length in bits */
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+ pal_cache_line_state_t pcli_cache_line_state; /* mesi state */
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+
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+} pal_cache_line_info_t;
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+
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+
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+/* Machine Check related crap */
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+
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+/* Pending event status bits */
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+typedef u64 pal_mc_pending_events_t;
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+
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+#define PAL_MC_PENDING_MCA (1 << 0)
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+#define PAL_MC_PENDING_INIT (1 << 1)
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+
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+/* Error information type */
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+typedef u64 pal_mc_info_index_t;
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+
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+#define PAL_MC_INFO_PROCESSOR 0 /* Processor */
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+#define PAL_MC_INFO_CACHE_CHECK 1 /* Cache check */
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+#define PAL_MC_INFO_TLB_CHECK 2 /* Tlb check */
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+#define PAL_MC_INFO_BUS_CHECK 3 /* Bus check */
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+#define PAL_MC_INFO_REQ_ADDR 4 /* Requestor address */
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+#define PAL_MC_INFO_RESP_ADDR 5 /* Responder address */
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+#define PAL_MC_INFO_TARGET_ADDR 6 /* Target address */
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+#define PAL_MC_INFO_IMPL_DEP 7 /* Implementation
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+ * dependent
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+ */
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+
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+#define PAL_TLB_CHECK_OP_PURGE 8
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+
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+typedef struct pal_process_state_info_s {
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+ u64 reserved1 : 2,
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+ rz : 1, /* PAL_CHECK processor
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+ * rendezvous
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+ * successful.
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+ */
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+
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+ ra : 1, /* PAL_CHECK attempted
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+ * a rendezvous.
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+ */
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+ me : 1, /* Distinct multiple
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+ * errors occurred
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+ */
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+
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+ mn : 1, /* Min. state save
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+ * area has been
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+ * registered with PAL
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+ */
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+
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+ sy : 1, /* Storage integrity
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+ * synched
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+ */
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+
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+
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+ co : 1, /* Continuable */
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+ ci : 1, /* MC isolated */
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+ us : 1, /* Uncontained storage
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+ * damage.
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+ */
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+
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+
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+ hd : 1, /* Non-essential hw
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+ * lost (no loss of
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+ * functionality)
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+ * causing the
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+ * processor to run in
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+ * degraded mode.
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+ */
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