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@@ -2106,3 +2106,77 @@ static struct omap_hwmod_class_sysconfig omap44xx_mcpdm_sysc = {
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};
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static struct omap_hwmod_class omap44xx_mcpdm_hwmod_class = {
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+ .name = "mcpdm",
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+ .sysc = &omap44xx_mcpdm_sysc,
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+};
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+
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+/* mcpdm */
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+static struct omap_hwmod_irq_info omap44xx_mcpdm_irqs[] = {
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+ { .irq = 112 + OMAP44XX_IRQ_GIC_START },
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+ { .irq = -1 }
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+};
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+
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+static struct omap_hwmod_dma_info omap44xx_mcpdm_sdma_reqs[] = {
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+ { .name = "up_link", .dma_req = 64 + OMAP44XX_DMA_REQ_START },
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+ { .name = "dn_link", .dma_req = 65 + OMAP44XX_DMA_REQ_START },
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+ { .dma_req = -1 }
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+};
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+
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+static struct omap_hwmod omap44xx_mcpdm_hwmod = {
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+ .name = "mcpdm",
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+ .class = &omap44xx_mcpdm_hwmod_class,
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+ .clkdm_name = "abe_clkdm",
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+ /*
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+ * It's suspected that the McPDM requires an off-chip main
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+ * functional clock, controlled via I2C. This IP block is
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+ * currently reset very early during boot, before I2C is
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+ * available, so it doesn't seem that we have any choice in
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+ * the kernel other than to avoid resetting it.
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+ *
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+ * Also, McPDM needs to be configured to NO_IDLE mode when it
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+ * is in used otherwise vital clocks will be gated which
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+ * results 'slow motion' audio playback.
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+ */
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+ .flags = HWMOD_EXT_OPT_MAIN_CLK | HWMOD_SWSUP_SIDLE,
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+ .mpu_irqs = omap44xx_mcpdm_irqs,
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+ .sdma_reqs = omap44xx_mcpdm_sdma_reqs,
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+ .main_clk = "mcpdm_fck",
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+ .prcm = {
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+ .omap4 = {
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+ .clkctrl_offs = OMAP4_CM1_ABE_PDM_CLKCTRL_OFFSET,
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+ .context_offs = OMAP4_RM_ABE_PDM_CONTEXT_OFFSET,
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+ .modulemode = MODULEMODE_SWCTRL,
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+ },
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+ },
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+};
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+
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+/*
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+ * 'mcspi' class
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+ * multichannel serial port interface (mcspi) / master/slave synchronous serial
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+ * bus
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+ */
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+
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+static struct omap_hwmod_class_sysconfig omap44xx_mcspi_sysc = {
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+ .rev_offs = 0x0000,
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+ .sysc_offs = 0x0010,
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+ .sysc_flags = (SYSC_HAS_EMUFREE | SYSC_HAS_RESET_STATUS |
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+ SYSC_HAS_SIDLEMODE | SYSC_HAS_SOFTRESET),
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+ .idlemodes = (SIDLE_FORCE | SIDLE_NO | SIDLE_SMART |
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+ SIDLE_SMART_WKUP),
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+ .sysc_fields = &omap_hwmod_sysc_type2,
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+};
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+
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+static struct omap_hwmod_class omap44xx_mcspi_hwmod_class = {
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+ .name = "mcspi",
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+ .sysc = &omap44xx_mcspi_sysc,
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+ .rev = OMAP4_MCSPI_REV,
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+};
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+
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+/* mcspi1 */
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+static struct omap_hwmod_irq_info omap44xx_mcspi1_irqs[] = {
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+ { .irq = 65 + OMAP44XX_IRQ_GIC_START },
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+ { .irq = -1 }
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+};
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+
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+static struct omap_hwmod_dma_info omap44xx_mcspi1_sdma_reqs[] = {
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+ { .name = "tx0", .dma_req = 34 + OMAP44XX_DMA_REQ_START },
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