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@@ -1243,3 +1243,105 @@ static struct omap_hwmod_dma_info omap3xxx_mcbsp4_sdma_chs[] = {
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{ .name = "rx", .dma_req = 20 },
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{ .name = "tx", .dma_req = 19 },
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{ .dma_req = -1 }
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+};
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+
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+static struct omap_hwmod omap3xxx_mcbsp4_hwmod = {
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+ .name = "mcbsp4",
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+ .class = &omap3xxx_mcbsp_hwmod_class,
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+ .mpu_irqs = omap3xxx_mcbsp4_irqs,
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+ .sdma_reqs = omap3xxx_mcbsp4_sdma_chs,
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+ .main_clk = "mcbsp4_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .prcm_reg_id = 1,
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+ .module_bit = OMAP3430_EN_MCBSP4_SHIFT,
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+ .module_offs = OMAP3430_PER_MOD,
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+ .idlest_reg_id = 1,
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+ .idlest_idle_bit = OMAP3430_ST_MCBSP4_SHIFT,
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+ },
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+ },
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+ .opt_clks = mcbsp234_opt_clks,
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+ .opt_clks_cnt = ARRAY_SIZE(mcbsp234_opt_clks),
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+};
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+
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+/* mcbsp5 */
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+static struct omap_hwmod_irq_info omap3xxx_mcbsp5_irqs[] = {
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+ { .name = "common", .irq = 27 + OMAP_INTC_START, },
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+ { .name = "tx", .irq = 81 + OMAP_INTC_START, },
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+ { .name = "rx", .irq = 82 + OMAP_INTC_START, },
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+ { .irq = -1 },
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+};
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+
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+static struct omap_hwmod_dma_info omap3xxx_mcbsp5_sdma_chs[] = {
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+ { .name = "rx", .dma_req = 22 },
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+ { .name = "tx", .dma_req = 21 },
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+ { .dma_req = -1 }
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+};
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+
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+static struct omap_hwmod omap3xxx_mcbsp5_hwmod = {
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+ .name = "mcbsp5",
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+ .class = &omap3xxx_mcbsp_hwmod_class,
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+ .mpu_irqs = omap3xxx_mcbsp5_irqs,
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+ .sdma_reqs = omap3xxx_mcbsp5_sdma_chs,
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+ .main_clk = "mcbsp5_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .prcm_reg_id = 1,
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+ .module_bit = OMAP3430_EN_MCBSP5_SHIFT,
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+ .module_offs = CORE_MOD,
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+ .idlest_reg_id = 1,
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+ .idlest_idle_bit = OMAP3430_ST_MCBSP5_SHIFT,
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+ },
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+ },
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+ .opt_clks = mcbsp15_opt_clks,
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+ .opt_clks_cnt = ARRAY_SIZE(mcbsp15_opt_clks),
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+};
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+
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+/* 'mcbsp sidetone' class */
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+static struct omap_hwmod_class_sysconfig omap3xxx_mcbsp_sidetone_sysc = {
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+ .sysc_offs = 0x0010,
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+ .sysc_flags = SYSC_HAS_AUTOIDLE,
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+ .sysc_fields = &omap_hwmod_sysc_type1,
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+};
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+
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+static struct omap_hwmod_class omap3xxx_mcbsp_sidetone_hwmod_class = {
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+ .name = "mcbsp_sidetone",
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+ .sysc = &omap3xxx_mcbsp_sidetone_sysc,
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+};
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+
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+/* mcbsp2_sidetone */
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+static struct omap_hwmod_irq_info omap3xxx_mcbsp2_sidetone_irqs[] = {
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+ { .name = "irq", .irq = 4 + OMAP_INTC_START, },
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+ { .irq = -1 },
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+};
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+
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+static struct omap_hwmod omap3xxx_mcbsp2_sidetone_hwmod = {
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+ .name = "mcbsp2_sidetone",
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+ .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
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+ .mpu_irqs = omap3xxx_mcbsp2_sidetone_irqs,
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+ .main_clk = "mcbsp2_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .prcm_reg_id = 1,
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+ .module_bit = OMAP3430_EN_MCBSP2_SHIFT,
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+ .module_offs = OMAP3430_PER_MOD,
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+ .idlest_reg_id = 1,
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+ .idlest_idle_bit = OMAP3430_ST_MCBSP2_SHIFT,
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+ },
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+ },
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+};
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+
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+/* mcbsp3_sidetone */
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+static struct omap_hwmod_irq_info omap3xxx_mcbsp3_sidetone_irqs[] = {
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+ { .name = "irq", .irq = 5 + OMAP_INTC_START, },
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+ { .irq = -1 },
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+};
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+
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+static struct omap_hwmod omap3xxx_mcbsp3_sidetone_hwmod = {
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+ .name = "mcbsp3_sidetone",
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+ .class = &omap3xxx_mcbsp_sidetone_hwmod_class,
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+ .mpu_irqs = omap3xxx_mcbsp3_sidetone_irqs,
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+ .main_clk = "mcbsp3_fck",
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+ .prcm = {
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+ .omap2 = {
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+ .prcm_reg_id = 1,
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