Browse Source

efElectricAgingTrendMining memoryOperation.h 岳彩东 commit at 2020-09-15

岳彩东 4 years ago
parent
commit
03a3db1028
1 changed files with 105 additions and 0 deletions
  1. 105 0
      efElectricAgingTrendMining/dataSharedMemory/memoryOperation.h

+ 105 - 0
efElectricAgingTrendMining/dataSharedMemory/memoryOperation.h

@@ -136,3 +136,108 @@
 #define OMAP4430_CMD_VDD_CORE_L_SHIFT					4
 #define OMAP4430_CMD_VDD_CORE_L_MASK					(1 << 4)
 
+/* Used by PRM_VC_CFG_CHANNEL */
+#define OMAP4430_CMD_VDD_IVA_L_SHIFT					12
+#define OMAP4430_CMD_VDD_IVA_L_MASK					(1 << 12)
+
+/* Used by PRM_VC_CFG_CHANNEL */
+#define OMAP4430_CMD_VDD_MPU_L_SHIFT					17
+#define OMAP4430_CMD_VDD_MPU_L_MASK					(1 << 17)
+
+/* Used by PM_CORE_PWRSTCTRL */
+#define OMAP4430_CORE_OCMRAM_ONSTATE_SHIFT				18
+#define OMAP4430_CORE_OCMRAM_ONSTATE_MASK				(0x3 << 18)
+
+/* Used by PM_CORE_PWRSTCTRL */
+#define OMAP4430_CORE_OCMRAM_RETSTATE_SHIFT				9
+#define OMAP4430_CORE_OCMRAM_RETSTATE_MASK				(1 << 9)
+
+/* Used by PM_CORE_PWRSTST */
+#define OMAP4430_CORE_OCMRAM_STATEST_SHIFT				6
+#define OMAP4430_CORE_OCMRAM_STATEST_MASK				(0x3 << 6)
+
+/* Used by PM_CORE_PWRSTCTRL */
+#define OMAP4430_CORE_OTHER_BANK_ONSTATE_SHIFT				16
+#define OMAP4430_CORE_OTHER_BANK_ONSTATE_MASK				(0x3 << 16)
+
+/* Used by PM_CORE_PWRSTCTRL */
+#define OMAP4430_CORE_OTHER_BANK_RETSTATE_SHIFT				8
+#define OMAP4430_CORE_OTHER_BANK_RETSTATE_MASK				(1 << 8)
+
+/* Used by PM_CORE_PWRSTST */
+#define OMAP4430_CORE_OTHER_BANK_STATEST_SHIFT				4
+#define OMAP4430_CORE_OTHER_BANK_STATEST_MASK				(0x3 << 4)
+
+/* Used by REVISION_PRM */
+#define OMAP4430_CUSTOM_SHIFT						6
+#define OMAP4430_CUSTOM_MASK						(0x3 << 6)
+
+/* Used by PRM_VC_VAL_BYPASS */
+#define OMAP4430_DATA_SHIFT						16
+#define OMAP4430_DATA_MASK						(0xff << 16)
+
+/* Used by PRM_DEVICE_OFF_CTRL */
+#define OMAP4430_DEVICE_OFF_ENABLE_SHIFT				0
+#define OMAP4430_DEVICE_OFF_ENABLE_MASK					(1 << 0)
+
+/* Used by PRM_VC_CFG_I2C_MODE */
+#define OMAP4430_DFILTEREN_SHIFT					6
+#define OMAP4430_DFILTEREN_MASK						(1 << 6)
+
+/*
+ * Used by PRM_LDO_SRAM_CORE_SETUP, PRM_LDO_SRAM_IVA_SETUP,
+ * PRM_LDO_SRAM_MPU_SETUP, PRM_SRAM_WKUP_SETUP
+ */
+#define OMAP4430_DISABLE_RTA_EXPORT_SHIFT				0
+#define OMAP4430_DISABLE_RTA_EXPORT_MASK				(1 << 0)
+
+/* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU, PRM_IRQENABLE_TESLA */
+#define OMAP4430_DPLL_ABE_RECAL_EN_SHIFT				4
+#define OMAP4430_DPLL_ABE_RECAL_EN_MASK					(1 << 4)
+
+/* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU, PRM_IRQSTATUS_TESLA */
+#define OMAP4430_DPLL_ABE_RECAL_ST_SHIFT				4
+#define OMAP4430_DPLL_ABE_RECAL_ST_MASK					(1 << 4)
+
+/* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
+#define OMAP4430_DPLL_CORE_RECAL_EN_SHIFT				0
+#define OMAP4430_DPLL_CORE_RECAL_EN_MASK				(1 << 0)
+
+/* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
+#define OMAP4430_DPLL_CORE_RECAL_ST_SHIFT				0
+#define OMAP4430_DPLL_CORE_RECAL_ST_MASK				(1 << 0)
+
+/* Used by PRM_IRQENABLE_MPU */
+#define OMAP4430_DPLL_DDRPHY_RECAL_EN_SHIFT				6
+#define OMAP4430_DPLL_DDRPHY_RECAL_EN_MASK				(1 << 6)
+
+/* Used by PRM_IRQSTATUS_MPU */
+#define OMAP4430_DPLL_DDRPHY_RECAL_ST_SHIFT				6
+#define OMAP4430_DPLL_DDRPHY_RECAL_ST_MASK				(1 << 6)
+
+/* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU, PRM_IRQENABLE_TESLA */
+#define OMAP4430_DPLL_IVA_RECAL_EN_SHIFT				2
+#define OMAP4430_DPLL_IVA_RECAL_EN_MASK					(1 << 2)
+
+/* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU, PRM_IRQSTATUS_TESLA */
+#define OMAP4430_DPLL_IVA_RECAL_ST_SHIFT				2
+#define OMAP4430_DPLL_IVA_RECAL_ST_MASK					(1 << 2)
+
+/* Used by PRM_IRQENABLE_MPU */
+#define OMAP4430_DPLL_MPU_RECAL_EN_SHIFT				1
+#define OMAP4430_DPLL_MPU_RECAL_EN_MASK					(1 << 1)
+
+/* Used by PRM_IRQSTATUS_MPU */
+#define OMAP4430_DPLL_MPU_RECAL_ST_SHIFT				1
+#define OMAP4430_DPLL_MPU_RECAL_ST_MASK					(1 << 1)
+
+/* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
+#define OMAP4430_DPLL_PER_RECAL_EN_SHIFT				3
+#define OMAP4430_DPLL_PER_RECAL_EN_MASK					(1 << 3)
+
+/* Used by PRM_IRQSTATUS_DUCATI, PRM_IRQSTATUS_MPU */
+#define OMAP4430_DPLL_PER_RECAL_ST_SHIFT				3
+#define OMAP4430_DPLL_PER_RECAL_ST_MASK					(1 << 3)
+
+/* Used by PRM_IRQENABLE_DUCATI, PRM_IRQENABLE_MPU */
+#define OMAP4430_DPLL_UNIPRO_RECAL_EN_SHIFT				7