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+/*
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+ * arch/arm/kernel/kprobes.h
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+ *
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+ * Copyright (C) 2011 Jon Medhurst <tixy@yxit.co.uk>.
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+ *
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+ * Some contents moved here from arch/arm/include/asm/kprobes.h which is
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+ * Copyright (C) 2006, 2007 Motorola Inc.
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+ *
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+ * This program is free software; you can redistribute it and/or modify
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+ * it under the terms of the GNU General Public License version 2 as
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+ * published by the Free Software Foundation.
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+ *
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+ * This program is distributed in the hope that it will be useful,
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+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
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+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
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+ * General Public License for more details.
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+ */
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+
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+#ifndef _ARM_KERNEL_KPROBES_H
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+#define _ARM_KERNEL_KPROBES_H
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+
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+/*
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+ * These undefined instructions must be unique and
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+ * reserved solely for kprobes' use.
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+ */
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+#define KPROBE_ARM_BREAKPOINT_INSTRUCTION 0x07f001f8
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+#define KPROBE_THUMB16_BREAKPOINT_INSTRUCTION 0xde18
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+#define KPROBE_THUMB32_BREAKPOINT_INSTRUCTION 0xf7f0a018
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+
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+
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+enum kprobe_insn {
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+ INSN_REJECTED,
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+ INSN_GOOD,
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+ INSN_GOOD_NO_SLOT
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+};
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+
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+typedef enum kprobe_insn (kprobe_decode_insn_t)(kprobe_opcode_t,
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+ struct arch_specific_insn *);
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+
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+#ifdef CONFIG_THUMB2_KERNEL
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+
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+enum kprobe_insn thumb16_kprobe_decode_insn(kprobe_opcode_t,
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+ struct arch_specific_insn *);
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+enum kprobe_insn thumb32_kprobe_decode_insn(kprobe_opcode_t,
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+ struct arch_specific_insn *);
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+
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+#else /* !CONFIG_THUMB2_KERNEL */
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+
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+enum kprobe_insn arm_kprobe_decode_insn(kprobe_opcode_t,
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+ struct arch_specific_insn *);
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+#endif
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+
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+void __init arm_kprobe_decode_init(void);
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+
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+extern kprobe_check_cc * const kprobe_condition_checks[16];
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+
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+
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+#if __LINUX_ARM_ARCH__ >= 7
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+
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+/* str_pc_offset is architecturally defined from ARMv7 onwards */
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+#define str_pc_offset 8
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+#define find_str_pc_offset()
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+
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+#else /* __LINUX_ARM_ARCH__ < 7 */
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+
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+/* We need a run-time check to determine str_pc_offset */
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+extern int str_pc_offset;
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+void __init find_str_pc_offset(void);
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+
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+#endif
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+
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+
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+/*
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+ * Update ITSTATE after normal execution of an IT block instruction.
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+ *
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+ * The 8 IT state bits are split into two parts in CPSR:
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+ * ITSTATE<1:0> are in CPSR<26:25>
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+ * ITSTATE<7:2> are in CPSR<15:10>
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+ */
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+static inline unsigned long it_advance(unsigned long cpsr)
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+ {
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+ if ((cpsr & 0x06000400) == 0) {
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+ /* ITSTATE<2:0> == 0 means end of IT block, so clear IT state */
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+ cpsr &= ~PSR_IT_MASK;
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+ } else {
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+ /* We need to shift left ITSTATE<4:0> */
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+ const unsigned long mask = 0x06001c00; /* Mask ITSTATE<4:0> */
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+ unsigned long it = cpsr & mask;
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+ it <<= 1;
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+ it |= it >> (27 - 10); /* Carry ITSTATE<2> to correct place */
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+ it &= mask;
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+ cpsr &= ~mask;
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+ cpsr |= it;
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+ }
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+ return cpsr;
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+}
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+
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+static inline void __kprobes bx_write_pc(long pcv, struct pt_regs *regs)
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+{
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+ long cpsr = regs->ARM_cpsr;
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+ if (pcv & 0x1) {
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+ cpsr |= PSR_T_BIT;
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+ pcv &= ~0x1;
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+ } else {
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+ cpsr &= ~PSR_T_BIT;
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+ pcv &= ~0x2; /* Avoid UNPREDICTABLE address allignment */
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+ }
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+ regs->ARM_cpsr = cpsr;
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+ regs->ARM_pc = pcv;
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+}
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+
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+
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+#if __LINUX_ARM_ARCH__ >= 6
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+
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+/* Kernels built for >= ARMv6 should never run on <= ARMv5 hardware, so... */
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+#define load_write_pc_interworks true
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+#define test_load_write_pc_interworking()
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+
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+#else /* __LINUX_ARM_ARCH__ < 6 */
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+
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+/* We need run-time testing to determine if load_write_pc() should interwork. */
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+extern bool load_write_pc_interworks;
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+void __init test_load_write_pc_interworking(void);
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+
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+#endif
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+
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+static inline void __kprobes load_write_pc(long pcv, struct pt_regs *regs)
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+{
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+ if (load_write_pc_interworks)
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+ bx_write_pc(pcv, regs);
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+ else
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+ regs->ARM_pc = pcv;
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+}
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+
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+
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