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@@ -129,3 +129,121 @@
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#define bfin_read_SPI0_DLY() bfin_read32(SPI0_DLY)
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#define bfin_write_SPI0_DLY(val) bfin_write32(SPI0_DLY, val)
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#define bfin_read_SPI0_SLVSEL() bfin_read32(SPI0_SLVSEL)
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+#define bfin_write_SPI0_SLVSEL(val) bfin_write32(SPI0_SLVSEL, val)
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+#define bfin_read_SPI0_RWC() bfin_read32(SPI0_RWC)
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+#define bfin_write_SPI0_RWC(val) bfin_write32(SPI0_RWC, val)
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+#define bfin_read_SPI0_RWCR() bfin_read32(SPI0_RWCR)
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+#define bfin_write_SPI0_RWCR(val) bfin_write32(SPI0_RWCR, val)
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+#define bfin_read_SPI0_TWC() bfin_read32(SPI0_TWC)
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+#define bfin_write_SPI0_TWC(val) bfin_write32(SPI0_TWC, val)
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+#define bfin_read_SPI0_TWCR() bfin_read32(SPI0_TWCR)
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+#define bfin_write_SPI0_TWCR(val) bfin_write32(SPI0_TWCR, val)
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+#define bfin_read_SPI0_IMSK() bfin_read32(SPI0_IMSK)
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+#define bfin_write_SPI0_IMSK(val) bfin_write32(SPI0_IMSK, val)
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+#define bfin_read_SPI0_IMSK_CLR() bfin_read32(SPI0_IMSK_CLR)
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+#define bfin_write_SPI0_IMSK_CLR(val) bfin_write32(SPI0_IMSK_CLR, val)
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+#define bfin_read_SPI0_IMSK_SET() bfin_read32(SPI0_IMSK_SET)
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+#define bfin_write_SPI0_IMSK_SET(val) bfin_write32(SPI0_IMSK_SET, val)
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+#define bfin_read_SPI0_STAT() bfin_read32(SPI0_STAT)
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+#define bfin_write_SPI0_STAT(val) bfin_write32(SPI0_STAT, val)
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+#define bfin_read_SPI0_ILAT() bfin_read32(SPI0_ILAT)
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+#define bfin_write_SPI0_ILAT(val) bfin_write32(SPI0_ILAT, val)
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+#define bfin_read_SPI0_ILAT_CLR() bfin_read32(SPI0_ILAT_CLR)
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+#define bfin_write_SPI0_ILAT_CLR(val) bfin_write32(SPI0_ILAT_CLR, val)
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+#define bfin_read_SPI0_RFIFO() bfin_read32(SPI0_RFIFO)
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+#define bfin_write_SPI0_RFIFO(val) bfin_write32(SPI0_RFIFO, val)
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+#define bfin_read_SPI0_TFIFO() bfin_read32(SPI0_TFIFO)
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+#define bfin_write_SPI0_TFIFO(val) bfin_write32(SPI0_TFIFO, val)
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+
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+/* SPI1 Registers */
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+
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+#define bfin_read_SPI1_CTL() bfin_read32(SPI1_CTL)
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+#define bfin_write_SPI1_CTL(val) bfin_write32(SPI1_CTL, val)
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+#define bfin_read_SPI1_RXCTL() bfin_read32(SPI1_RXCTL)
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+#define bfin_write_SPI1_RXCTL(val) bfin_write32(SPI1_RXCTL, val)
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+#define bfin_read_SPI1_TXCTL() bfin_read32(SPI1_TXCTL)
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+#define bfin_write_SPI1_TXCTL(val) bfin_write32(SPI1_TXCTL, val)
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+#define bfin_read_SPI1_CLK() bfin_read32(SPI1_CLK)
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+#define bfin_write_SPI1_CLK(val) bfin_write32(SPI1_CLK, val)
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+#define bfin_read_SPI1_DLY() bfin_read32(SPI1_DLY)
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+#define bfin_write_SPI1_DLY(val) bfin_write32(SPI1_DLY, val)
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+#define bfin_read_SPI1_SLVSEL() bfin_read32(SPI1_SLVSEL)
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+#define bfin_write_SPI1_SLVSEL(val) bfin_write32(SPI1_SLVSEL, val)
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+#define bfin_read_SPI1_RWC() bfin_read32(SPI1_RWC)
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+#define bfin_write_SPI1_RWC(val) bfin_write32(SPI1_RWC, val)
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+#define bfin_read_SPI1_RWCR() bfin_read32(SPI1_RWCR)
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+#define bfin_write_SPI1_RWCR(val) bfin_write32(SPI1_RWCR, val)
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+#define bfin_read_SPI1_TWC() bfin_read32(SPI1_TWC)
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+#define bfin_write_SPI1_TWC(val) bfin_write32(SPI1_TWC, val)
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+#define bfin_read_SPI1_TWCR() bfin_read32(SPI1_TWCR)
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+#define bfin_write_SPI1_TWCR(val) bfin_write32(SPI1_TWCR, val)
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+#define bfin_read_SPI1_IMSK() bfin_read32(SPI1_IMSK)
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+#define bfin_write_SPI1_IMSK(val) bfin_write32(SPI1_IMSK, val)
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+#define bfin_read_SPI1_IMSK_CLR() bfin_read32(SPI1_IMSK_CLR)
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+#define bfin_write_SPI1_IMSK_CLR(val) bfin_write32(SPI1_IMSK_CLR, val)
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+#define bfin_read_SPI1_IMSK_SET() bfin_read32(SPI1_IMSK_SET)
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+#define bfin_write_SPI1_IMSK_SET(val) bfin_write32(SPI1_IMSK_SET, val)
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+#define bfin_read_SPI1_STAT() bfin_read32(SPI1_STAT)
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+#define bfin_write_SPI1_STAT(val) bfin_write32(SPI1_STAT, val)
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+#define bfin_read_SPI1_ILAT() bfin_read32(SPI1_ILAT)
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+#define bfin_write_SPI1_ILAT(val) bfin_write32(SPI1_ILAT, val)
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+#define bfin_read_SPI1_ILAT_CLR() bfin_read32(SPI1_ILAT_CLR)
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+#define bfin_write_SPI1_ILAT_CLR(val) bfin_write32(SPI1_ILAT_CLR, val)
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+#define bfin_read_SPI1_RFIFO() bfin_read32(SPI1_RFIFO)
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+#define bfin_write_SPI1_RFIFO(val) bfin_write32(SPI1_RFIFO, val)
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+#define bfin_read_SPI1_TFIFO() bfin_read32(SPI1_TFIFO)
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+#define bfin_write_SPI1_TFIFO(val) bfin_write32(SPI1_TFIFO, val)
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+
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+/* Timer 0-7 registers */
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+#define bfin_read_TIMER0_CONFIG() bfin_read16(TIMER0_CONFIG)
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+#define bfin_write_TIMER0_CONFIG(val) bfin_write16(TIMER0_CONFIG, val)
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+#define bfin_read_TIMER0_COUNTER() bfin_read32(TIMER0_COUNTER)
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+#define bfin_write_TIMER0_COUNTER(val) bfin_write32(TIMER0_COUNTER, val)
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+#define bfin_read_TIMER0_PERIOD() bfin_read32(TIMER0_PERIOD)
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+#define bfin_write_TIMER0_PERIOD(val) bfin_write32(TIMER0_PERIOD, val)
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+#define bfin_read_TIMER0_WIDTH() bfin_read32(TIMER0_WIDTH)
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+#define bfin_write_TIMER0_WIDTH(val) bfin_write32(TIMER0_WIDTH, val)
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+#define bfin_read_TIMER1_CONFIG() bfin_read16(TIMER1_CONFIG)
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+#define bfin_write_TIMER1_CONFIG(val) bfin_write16(TIMER1_CONFIG, val)
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+#define bfin_read_TIMER1_COUNTER() bfin_read32(TIMER1_COUNTER)
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+#define bfin_write_TIMER1_COUNTER(val) bfin_write32(TIMER1_COUNTER, val)
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+#define bfin_read_TIMER1_PERIOD() bfin_read32(TIMER1_PERIOD)
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+#define bfin_write_TIMER1_PERIOD(val) bfin_write32(TIMER1_PERIOD, val)
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+#define bfin_read_TIMER1_WIDTH() bfin_read32(TIMER1_WIDTH)
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+#define bfin_write_TIMER1_WIDTH(val) bfin_write32(TIMER1_WIDTH, val)
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+#define bfin_read_TIMER2_CONFIG() bfin_read16(TIMER2_CONFIG)
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+#define bfin_write_TIMER2_CONFIG(val) bfin_write16(TIMER2_CONFIG, val)
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+#define bfin_read_TIMER2_COUNTER() bfin_read32(TIMER2_COUNTER)
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+#define bfin_write_TIMER2_COUNTER(val) bfin_write32(TIMER2_COUNTER, val)
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+#define bfin_read_TIMER2_PERIOD() bfin_read32(TIMER2_PERIOD)
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+#define bfin_write_TIMER2_PERIOD(val) bfin_write32(TIMER2_PERIOD, val)
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+#define bfin_read_TIMER2_WIDTH() bfin_read32(TIMER2_WIDTH)
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+#define bfin_write_TIMER2_WIDTH(val) bfin_write32(TIMER2_WIDTH, val)
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+#define bfin_read_TIMER3_CONFIG() bfin_read16(TIMER3_CONFIG)
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+#define bfin_write_TIMER3_CONFIG(val) bfin_write16(TIMER3_CONFIG, val)
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+#define bfin_read_TIMER3_COUNTER() bfin_read32(TIMER3_COUNTER)
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+#define bfin_write_TIMER3_COUNTER(val) bfin_write32(TIMER3_COUNTER, val)
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+#define bfin_read_TIMER3_PERIOD() bfin_read32(TIMER3_PERIOD)
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+#define bfin_write_TIMER3_PERIOD(val) bfin_write32(TIMER3_PERIOD, val)
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+#define bfin_read_TIMER3_WIDTH() bfin_read32(TIMER3_WIDTH)
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+#define bfin_write_TIMER3_WIDTH(val) bfin_write32(TIMER3_WIDTH, val)
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+#define bfin_read_TIMER4_CONFIG() bfin_read16(TIMER4_CONFIG)
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+#define bfin_write_TIMER4_CONFIG(val) bfin_write16(TIMER4_CONFIG, val)
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+#define bfin_read_TIMER4_COUNTER() bfin_read32(TIMER4_COUNTER)
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+#define bfin_write_TIMER4_COUNTER(val) bfin_write32(TIMER4_COUNTER, val)
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+#define bfin_read_TIMER4_PERIOD() bfin_read32(TIMER4_PERIOD)
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+#define bfin_write_TIMER4_PERIOD(val) bfin_write32(TIMER4_PERIOD, val)
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+#define bfin_read_TIMER4_WIDTH() bfin_read32(TIMER4_WIDTH)
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+#define bfin_write_TIMER4_WIDTH(val) bfin_write32(TIMER4_WIDTH, val)
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+#define bfin_read_TIMER5_CONFIG() bfin_read16(TIMER5_CONFIG)
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+#define bfin_write_TIMER5_CONFIG(val) bfin_write16(TIMER5_CONFIG, val)
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+#define bfin_read_TIMER5_COUNTER() bfin_read32(TIMER5_COUNTER)
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+#define bfin_write_TIMER5_COUNTER(val) bfin_write32(TIMER5_COUNTER, val)
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+#define bfin_read_TIMER5_PERIOD() bfin_read32(TIMER5_PERIOD)
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+#define bfin_write_TIMER5_PERIOD(val) bfin_write32(TIMER5_PERIOD, val)
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+#define bfin_read_TIMER5_WIDTH() bfin_read32(TIMER5_WIDTH)
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+#define bfin_write_TIMER5_WIDTH(val) bfin_write32(TIMER5_WIDTH, val)
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+#define bfin_read_TIMER6_CONFIG() bfin_read16(TIMER6_CONFIG)
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+#define bfin_write_TIMER6_CONFIG(val) bfin_write16(TIMER6_CONFIG, val)
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+#define bfin_read_TIMER6_COUNTER() bfin_read32(TIMER6_COUNTER)
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+#define bfin_write_TIMER6_COUNTER(val) bfin_write32(TIMER6_COUNTER, val)
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袁明明